Inventor
Douglas E. Morrissey
Inventor
Allentown, PA, US
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing88%
H03KPulse technique6%
H04LTransmission of digital information, e.g. telegraphic communication6%
PatentTitleYear
9,069,906'Method for sharing a resource and circuit making use of same'20158,689,218'Method for sharing a resource and circuit making use of same'20148,543,750'Method for sharing a resource and circuit making use of same'20138,130,019'Clock signal propagation method for integrated circuits (ICs) and integrated circuit making use of same'20126,587,931'Directory-based cache coherency system supporting multiple instruction processor and input/output caches'20036,438,659'Directory based cache coherency system supporting multiple instruction processor and input/output caches'20026,389,515'System and method for avoiding deadlocks utilizing split lock operations to provide exclusive access to memory during non-atomic operations'20026,314,501'Computer system and method for operating multiple operating systems in different partitions of the computer system and for allowing the different partitions to communicate with one another through shared memory'20016,092,156'System and method for avoiding deadlocks utilizing split lock operations to provide exclusive access to memory during non-atomic operations'20006,052,760'Computer system including plural caches and utilizing access history or patterns to determine data ownership for efficient handling of software locks'20006,049,845'System and method for providing speculative arbitration for transferring data'20006,014,709'Message flow protocol for avoiding deadlocks'20005,832,310'Serial I/O channel having dependent and synchronous sources of control data and user defined data'19985,553,302'Serial I/O channel having independent and asynchronous facilities with sequence recognition, frame recognition, and frame receiving mechanism for receiving control and user defined data'19965,463,762'I/O subsystem with header and error detection code generation and checking'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995–2003Patents assigned to UNISYS CORP (11)· patent assignee history
1995–1998Based in Exton, PA, US· patent location history
2000–2003Based in Allentown, PA, US· patent location history
2012–2015Patents assigned to OCTASIC INC (4)· patent assignee history
2012–2014Patents assigned to AWAD TOM (3)· patent assignee history
2012–2014Patents assigned to FILTEAU MARTIN (3)· patent assignee history
2012–2014Patents assigned to GERVAIS PASCAL (3)· patent assignee history
2012–2014Based in Montreal, CA· patent location history
2015Based in Montréal, CA· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| UNISYS CORP | 11 | 1995–2003 |
| OCTASIC INC | 4 | 2012–2015 |
| AWAD TOM | 3 | 2012–2014 |
| FILTEAU MARTIN | 3 | 2012–2014 |
| GERVAIS PASCAL | 3 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Allentown, Pennsylvania, US | 8 | 2000–2003 |
| Montreal, CA | 3 | 2012–2014 |
| Exton, Pennsylvania, US | 3 | 1995–1998 |
| Montréal, CA | 1 | 2015 |