Inventor

Keith H. Tabakman

Inventor
Fishkill, NY, US

Overview

35→
Patents
2010–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 35 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices32%
H01LSemiconductor devices27%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
H10BElectronic memory devices3%
G01BMeasuring length, thickness or similar linear dimensions1%
G01RMeasuring electric variables1%
G02BOptical elements, systems or apparatus1%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%
G05BControl or regulating systems in general1%
PatentTitleYear
11,081,583FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth202110,991,796Source/drain contact depth control202110,978,566Middle of line structures202110,825,811Gate cut first isolation formation with contact forming process mask protection202010,741,554Third type of metal gate stack for CMOS devices202010,734,233FinFET with high-k spacer and self-aligned contact capping layer202010,635,007Apparatus and method for aligning integrated circuit layers using multiple grating materials202010,615,279FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth202010,580,875Middle of line structures202010,297,504Methods of forming a gate structure-to-source/drain conductive contact and the resulting devices201910,262,996Third type of metal gate stack for CMOS devices201910,243,077FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth201910,192,791Semiconductor devices with robust low-k sidewall spacers and method for producing the same201910,049,985Contact line having insulating spacer therein and method of forming same20189,917,190'FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth'20189,831,123Methods of forming MIS contact structures on transistor devices20179,812,400'Contact line having insulating spacer therein and method of forming same'20179,634,006'Third type of metal gate stack for CMOS devices'20179,613,855'Methods of forming MIS contact structures on transistor devices in CMOS applications'20179,536,900'Forming fins of different semiconductor materials on the same substrate'20179,312,364'finFET with dielectric isolation after gate module for improved source and drain region epitaxial growth'20169,293,593'Self aligned device with enhanced stress and methods of manufacture'20169,171,800'Electrical fuse with bottom contacts'20159,059,286'Pre-gate, source/drain strain layer formation'20159,006,052'Self aligned device with enhanced stress and methods of manufacture'20158,815,656'Semiconductor device and method with greater epitaxial growth on 110 crystal plane'20148,779,525'Method for growing strain-inducing materials in CMOS circuits in a gate first flow'20148,618,617'Field effect transistor device'20138,492,234'Field effect transistor device'20138,426,265'Method for growing strain-inducing materials in CMOS circuits in a gate first flow'20138,361,859'Stressed transistor with improved metastability'20138,084,788'Method of forming source and drain of a field-effect-transistor and structure thereof'20117,895,008'Method of performing measurement sampling of lots in a manufacturing process'20117,781,239'Semiconductor device defect type determination method and structure'20107,751,920'Method and system of data weighted object orientation for data mining'2010

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2010–2021Patents assigned to IBM (21)· patent assignee history
2010–2019Based in Fishkill, NY, US· patent location history
2011–2013Patents assigned to DUBE ABHISHEK (4)· patent assignee history
2011–2021Based in Newburgh, NY, US· patent location history
2013–2020Patents assigned to GLOBALFOUNDRIES INC (17)· patent assignee history
2013–2016Patents assigned to HOLT JUDSON R (5)· patent assignee history
2013–2016Patents assigned to TABAKMAN KEITH H (5)· patent assignee history
2015Based in Hopewell Junction, NY, US· patent location history
2017–2021Based in Gansevoort, NY, US· patent location history
2020–2021Based in Wilton, NY, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM212010–2021
GLOBALFOUNDRIES INC172013–2020
HOLT JUDSON R52013–2016
TABAKMAN KEITH Hself52013–2016
DUBE ABHISHEK42011–2013
Locations
LocationPatentsSpan
Fishkill, New York, US132010–2019
Gansevoort, New York, US102017–2021
Newburgh, New York, US92011–2021
Wilton, New York, US22020–2021
Hopewell Junction, New York, US12015