Inventor

Susumu Komoriya

Inventor
Tokorozawa, JP

Overview

21→
Patents
1980–2013
Patent span
Physics
Primary field (CPC G)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G03Fprimary
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices25%
B29CShaping or joining of plastics9%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
B24DTools for grinding, buffing or sharpening7%
B82YSpecific uses or applications of nanostructures7%
C30BSingle-crystal growth7%
G11BInformation storage based on relative movement between record carrier and transducer7%
H10DInorganic electric semiconductor devices7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
B29LIndexing scheme associated with subclass b29c, relating to particular articles5%
PatentTitleYear
8,491,291'Pattern transfer method and imprint device'20138,268,209'Pattern forming method and its mold'20128,133,418'Pattern transfer method and imprint device'20128,109,751'Imprint device and microstructure transfer method'20128,096,802'Nanoimprint stamper and a fine-structure transfer apparatus using the stamper'20128,092,209'Imprinting device'20128,016,585'Nanoimprint resin stamper'2011RE040139'Wafer having chamfered bend portions in the joint regions between the contour of the cut-away portion of the wafer'20085,747,201'Controlling method of forming thin film, system for said controlling method, exposure method and system for said exposure method'19985,432,608'Method of making semiconductor integrated circuit, pattern detecting method, and system for semiconductor alignment and reduced stepping exposure for use in same'19955,409,538'Controlling method of forming thin film, system for said controlling method, exposure method and system for said exposure method'19955,279,992'Method of producing a wafer having a curved notch'19945,260,771'Method of making semiconductor integrated circuit, pattern detecting method, and system for semiconductor alignment and reduced stepping exposure for use in same'19935,230,747'Wafer having chamfered bend portions in the joint regions between the contour of the wafer and the cut-away portion of the wafer'19935,094,539'Method of making semiconductor integrated circuit, pattern detecting method, and system for semiconductor alignment and reduced stepping exposure for use in same'19925,025,284'Exposure method and exposure apparatus'19914,974,018'Exposure method and exposure apparatus'19904,783,225'Wafer and method of working the same'19884,699,505'Exposure method and exposure apparatus'19874,298,273'Projection aligner and method of positioning a wafer'19814,218,136'Method of and apparatus for aligning photomask'1980

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1980–2013Patents assigned to HITACHI LTD (16)· patent assignee history
1980–1981Based in Tachikawa, JP· patent location history
1987–2013Based in Tokorozawa, JP· patent location history
2008–2012Based in Saitama, JP· patent location history
2011–2012Patents assigned to HITACHI HIGH TECH CORP (4)· patent assignee history
2011Based in Ashigarakami-gun, JP· patent location history
2012–2013Patents assigned to ANDO TAKASHI (6)· patent assignee history
2012–2013Patents assigned to KOMORIYA SUSUMU (6)· patent assignee history
2012–2013Patents assigned to MIYAUCHI AKIHIRO (5)· patent assignee history
2012Based in Kodama-gun, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
HITACHI LTD161980–2013
ANDO TAKASHI62012–2013
KOMORIYA SUSUMUself62012–2013
MIYAUCHI AKIHIRO52012–2013
HITACHI HIGH TECH CORP42011–2012
Locations
LocationPatentsSpan
Tokorozawa, JP151987–2013
Saitama, JP22008–2012
Tachikawa, JP21980–1981
Kodama-gun, JP12012
Ashigarakami-gun, JP12011