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Inventor

Christopher S. Putnam

Inventor
Hinesburg, VT, US

Overview

61→
Patents
2003–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 61 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices38%
H01LSemiconductor devices16%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
H02HEmergency protective circuit arrangements6%
G06FElectric digital data processing4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
H03KPulse technique2%
Y10TTechnical subjects covered by former us classification2%
G01RMeasuring electric variables2%
PatentTitleYear
10,755,949Structures, methods and applications for electrical pulse anneal processes202010,393,782Structures and methods for RF de-embedding201910,283,374Structures, methods and applications for electrical pulse anneal processes201910,037,895Structures, methods and applications for electrical pulse anneal processes20189,881,810'Structures, methods and applications for electrical pulse anneal processes'20189,536,870'SCR with fin body regions for ESD protection'20179,413,169'Electrostatic discharge protection circuit with a fail-safe mechanism'20169,240,471'SCR with fin body regions for ESD protection'20169,070,629'Through silicon via repair'20159,064,786'Dual three-dimensional (3D) resistor and methods of forming'20159,006,783'Silicon controlled rectifier with integral deep trench capacitor'20158,940,588'Bulk FinFET ESD devices'20158,916,919'Interdigitated vertical native capacitor'20148,917,083'Structures and methods for RF de-embedding'20148,912,625'Semiconductor-on-insulator device with asymmetric structure'20148,891,212'RC-triggered semiconductor controlled rectifier for ESD protection of signal pads'20148,890,249'Bulk FinFET ESD device'20148,847,354'Metal-insulator-metal capacitors with high capacitance density'20148,841,174'Silicon controlled rectifier with integral deep trench capacitor'20148,815,654'Vertical current controlled silicon on insulator (SOI) device such as a silicon controlled rectifier and method of forming vertical SOI current controlled devices'20148,760,831'Bi-directional back-to-back stacked SCR for high-voltage pin ESD protection, methods of manufacture and design structures'20148,748,985'Semiconductor structures with thinned junctions and methods of manufacture'20148,686,508'Structures, methods and applications for electrical pulse anneal processes'20148,669,146'Semiconductor structures with thinned junctions and methods of manufacture'20148,642,452'Semiconductor-on-insulator device with asymmetric structure'20148,637,353'Through silicon via repair'20148,637,388'Semiconductor device heat dissipation structure'20148,610,249'Non-planar capacitor and method of forming the non-planar capacitor'20138,575,718'Programmable electrical fuse'20138,503,140'Bi-directional back-to-back stacked SCR for high-voltage pin ESD protection, methods of manufacture and design structures'20138,445,355'Metal-insulator-metal capacitors with high capacitance density'20138,421,128'Semiconductor device heat dissipation structure'20138,390,068'Electrostatic discharge protection device and method of fabricating same'20138,217,455'Semiconductor-on-insulator device structures with a body-to-substrate connection for enhanced electrostatic discharge protection, and design structures for such semiconductor-on-insulator device structures'20128,138,546'Electrostatic discharge protection device and method of fabricating same'20128,101,505'Programmable electrical fuse'20127,956,671'Circuit structure and method for programming and re-programming a low power, multiple states, electronic fuse (e-fuse)'20117,881,028'E-fuse used to disable a triggering network'20117,863,117'Multilayer silicon over insulator device'20117,826,185'Structure and circuit technique for uniform triggering of multifinger semiconductor devices with tunable trigger voltage'20107,814,454'Selectable device options for characterizing semiconductor devices'20107,786,535'Design structures for high-voltage integrated circuits'20107,772,651'Semiconductor-on-insulator high-voltage device structures, methods of fabricating such device structures, and design structures for high-voltage circuits'20107,746,607'Substrate triggering for ESD protection in SOI'20107,714,356'Design structure for uniform triggering of multifinger semiconductor devices with tunable trigger voltage'20107,547,917'Inverted multilayer semiconductor device assembly'20097,518,845'RC-triggered power clamp suppressing negative mode electrostatic discharge stress'20097,517,806'Integrated circuit having pairs of parallel complementary FinFETs'20097,457,086'High voltage ESD power clamp'20087,399,665'Electrostatic discharge protection device and method of fabricating same'20087,348,658'Multilayer silicon over insulator device'20087,298,008'Electrostatic discharge protection device and method of fabricating same'20077,274,546'Apparatus and method for improved triggering and leakage current control of ESD clamping devices'20077,203,045'High voltage ESD power clamp'20077,138,313'Method for creating a self-aligned SOI diode by removing a polysilicon gate during processing'20067,098,513'Low trigger voltage, low leakage ESD NFET'20066,965,503'Electro-static discharge protection circuit'20056,943,405'Integrated circuit having pairs of parallel complementary FinFETs'20056,881,672'Selective silicide blocking'20056,700,163'Selective silicide blocking'20046,563,131'Method and structure of a dual/wrap-around gate field effect transistor'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2020Patents assigned to IBM (59)· patent assignee history
2003–2020Based in Hinesburg, VT, US· patent location history
2012–2014Patents assigned to GAUTHIER JR ROBERT J (15)· patent assignee history
2012–2014Patents assigned to LI JUNJUN (15)· patent assignee history
2012–2014Patents assigned to MITRA SOUVICK (15)· patent assignee history
2012–2014Patents assigned to PUTNAM CHRISTOPHER S (15)· patent assignee history
2015Based in Essex Junction, VT, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM592003–2020
GAUTHIER JR ROBERT J152012–2014
LI JUNJUN152012–2014
MITRA SOUVICK152012–2014
PUTNAM CHRISTOPHER Sself152012–2014
Locations
LocationPatentsSpan
Hinesburg, VT, US602003–2020
Essex Junction, VT, US12015