Inventor

Krishnan K. Kailas

Inventor

Tarrytown, NY, US

Overview

29→

Patents

2008–2020

Patent span

Physics

Primary field (CPC G)

Patents· 29 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing52%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use13%

G11CStatic stores8%

H01LSemiconductor devices8%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%

G01RMeasuring electric variables4%

H10DInorganic electric semiconductor devices4%

Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications4%

PatentTitleYear

10,699,049System design using accurate performance models2020 10,331,829System design using accurate performance models2019 9,696,379'Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers'2017 9,569,402'3-D stacked multiprocessor structure with vertically aligned identical layout operating processors in independent mode or in sharing mode running faster components'2017 9,471,535'3-D stacked multiprocessor structures and methods for multimodal operation of same'2016 9,442,884'3-D stacked multiprocessor structures and methods for multimodal operation of same'2016 9,389,876'Three-dimensional processing system having independent calibration and statistical collection layer'2016 9,383,411'Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers'2016 9,336,144'Three-dimensional processing system having multiple caches that can be partitioned, conjoined, and managed according to more than one set of rules and/or configurations'2016 9,298,672'3-D stacked multiprocessor structure with vertically aligned identical layout operating processors in independent mode or in sharing mode running faster components'2016 9,257,152'Memory architectures having wiring structures that enable different access patterns in multiple dimensions'2016 9,195,630'Three-dimensional computer processor systems having multiple local power and cooling layers and a global interconnection structure'2015 9,190,118'Memory architectures having wiring structures that enable different access patterns in multiple dimensions'2015 9,063,807'Method and structure for provably fair random number generator'2015 8,997,030'Enhanced case-splitting based property checking'2015 8,978,001'Enhanced case-splitting based property checking'2015 8,826,073'3-D stacked multiprocessor structures and methods to enable reliable operation of processors at speeds above specified limits'2014 8,799,710'3-D stacked multiprocessor structures and methods to enable reliable operation of processors at speeds above specified limits'2014 8,312,071'Method and structure for provably fair random number generator'2012 8,301,870'Method and apparatus for fast synchronization and out-of-order execution of instructions in a meta-program based computing system'2012 7,836,256'Method and apparatus for application-specific dynamic cache placement'2010 7,752,369'Bounded starvation checking of an arbiter using formal verification'2010 7,711,929'Method and system for tracking instruction dependency in an out-of-order processor'2010 7,665,070'Method and apparatus for a computing system using meta program representation'2010 7,660,971'Method and system for dependency tracking and flush recovery for an out-of-order microprocessor'2010 7,506,139'Method and apparatus for register renaming using multiple physical register files and avoiding associative search'2009 7,502,890'Method and apparatus for dynamic priority-based cache replacement'2009 7,484,075'Method and apparatus for providing fast remote register access in a clustered VLIW processor using partitioned register files'2009 7,454,597'Computer processing system employing an instruction schedule cache'2008

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2008–2020Patents assigned to IBM (27)· patent assignee history

2008–2020Based in Tarrytown, NY, US· patent location history

2009–2010Based in Ossining, NY, US· patent location history

2012–2017Patents assigned to KAILAS KRISHNAN KUNJUNNY (7)· patent assignee history

2014–2017Patents assigned to BUYUKTOSUNOGLU ALPER (6)· patent assignee history

2014–2017Patents assigned to EMMA PHILIP G (6)· patent assignee history

2014–2017Patents assigned to HARTSTEIN ALLAN M (6)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	27	2008–2020
KAILAS KRISHNAN KUNJUNNYself	7	2012–2017
BUYUKTOSUNOGLU ALPER	6	2014–2017
EMMA PHILIP G	6	2014–2017
HARTSTEIN ALLAN M	6	2014–2017

Locations

Location	Patents	Span
Tarrytown, New York, US	27	2008–2020
Ossining, New York, US	2	2009–2010