Inventor
Michael N. Misheloff
Inventor
Dublin, CA, US
Overview
Patents· 13 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing47%
H10DInorganic electric semiconductor devices11%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
G01RMeasuring electric variables5%
G02BOptical elements, systems or apparatus5%
G06TImage data processing or generation, in general5%
H01PWaveguides5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
Y10TTechnical subjects covered by former us classification5%
PatentTitleYear
8,069,424'Generating a base curve database to reduce storage cost'20117,444,605'Generating a base curve database to reduce storage cost'20086,751,579'Method of scaling table based cell library timing models in order to take into account process, temperature and power supply'20046,569,757'Methods for forming co-axial interconnect lines in a CMOS process for high speed applications'20036,545,338'Methods for implementing co-axial interconnect lines in a CMOS process for high speed RF and microwave applications'20036,387,720'Waveguide structures integrated with standard CMOS circuitry and methods for making the same'20025,903,468'Determining maximum load index for tabular timing models'19995,841,672'Method and apparatus for verifying signal timing of electrical circuits'19985,815,416'Method of measuring energy consumption in a circuit simulator'19985,625,803'Slew rate based power usage simulation and method'19975,559,715'Timing model and characterization system for logic simulation of integrated circuits which takes into account process, temperature and power supply variations'19965,548,526'Timing model and characterization system for logic simulation of integrated circuits'19965,461,579'Extraction method for automated determination of source/drain resistance'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995–1999Patents assigned to VLSI TECHNOLOGY INC (7)· patent assignee history
1995–2011Based in Dublin, CA, US· patent location history
2003–2004Patents assigned to KONINKL PHILIPS ELECTRONICS NV (2)· patent assignee history
2008–2011Patents assigned to SYNOPSYS INC (2)· patent assignee history
2011Patents assigned to LEVY HAROLD J (1)· patent assignee history
2011Patents assigned to MISHELOFF MICHAEL N (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| VLSI TECHNOLOGY INC | 7 | 1995–1999 |
| KONINKL PHILIPS ELECTRONICS NV | 2 | 2003–2004 |
| SYNOPSYS INC | 2 | 2008–2011 |
| LEVY HAROLD J | 1 | 2011 |
| MISHELOFF MICHAEL Nself | 1 | 2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| Dublin, California, US | 13 | 1995–2011 |