Inventor
David Wentzlaff
Inventor
Cambridge, MA, US
Overview
Patents· 36 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing64%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use18%
H04LTransmission of digital information, e.g. telegraphic communication13%
G05FSystems for regulating electric or magnetic variables2%
G11CStatic stores2%
H03KPulse technique2%
PatentTitleYear
11,043,259System and method for in-memory compute202110,642,772Flow control in a parallel processing environment202010,013,391Architecture emulation in a parallel processing environment201810,002,096Flow control in a parallel processing environment20189,934,010Programming in a multiprocessor environment20189,639,487'Managing cache memory in a parallel processing environment'20179,329,798'Flow control in a parallel processing environment'20169,298,618'Managing cache memory in a parallel processing environment'20169,009,660'Programming in a multiprocessor environment'20158,738,860'Computing in parallel processing environments'20148,677,081'Transferring and storing data in multicore and multiprocessor architectures'20148,635,378'Flow control in a parallel processing environment'20148,631,205'Managing cache memory in a parallel processing environment'20148,516,222'Virtual architectures in a parallel processing environment'20138,200,901'Managing cache memory in a parallel processing environment'20128,190,855'Coupling data for interrupt processing in a parallel processing environment'20128,127,111'Managing data provided to switches in a parallel processing environment'20128,078,832'Virtual architectures in a parallel processing environment'20118,046,563'Virtual architectures in a parallel processing environment'20118,018,849'Flow control in a parallel processing environment'20117,882,307'Managing cache memory in a parallel processing environment'20117,853,774'Managing buffer storage in a parallel processing environment'20107,814,242'Managing data flows in a parallel processing environment'20107,805,577'Managing memory access in a parallel processing environment'20107,793,074'Directing data in a parallel processing environment'20107,774,579'Protection in a parallel processing environment using access information associated with each switch to prevent data from being forwarded outside a plurality of tiles'20107,734,894'Managing data forwarded between processors in a parallel processing environment based on operations associated with instructions issued by the processors'20107,734,895'Configuring sets of processor cores for processing instructions'20107,668,979'Buffering data in a parallel processing environment'20107,636,835'Coupling data in a parallel processing environment'20097,624,248'Managing memory in a parallel processing environment'20097,620,791'Mapping memory in a parallel processing environment'20097,577,820'Managing data in a parallel processing environment'20097,539,845'Coupling integrated circuits in a parallel processing environment'20097,461,236'Transferring data in a parallel processing environment'20087,461,210'Managing set associative cache memory according to entry type'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2008–2016Patents assigned to TILERA CORP (26)· patent assignee history
2008–2015Based in Cambridge, MA, US· patent location history
2010–2018Patents assigned to MASSACHUSETTS INST TECHNOLOGY (5)· patent assignee history
2011–2018Patents assigned to AGARWAL ANANT (10)· patent assignee history
2011–2015Patents assigned to WENTZLAFF DAVID (7)· patent assignee history
2012–2017Patents assigned to MATTINA MATTHEW (6)· patent assignee history
2014–2021Based in Princeton Junction, NJ, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TILERA CORP | 26 | 2008–2016 |
| AGARWAL ANANT | 10 | 2011–2018 |
| WENTZLAFF DAVIDself | 7 | 2011–2015 |
| MATTINA MATTHEW | 6 | 2012–2017 |
| MASSACHUSETTS INST TECHNOLOGY | 5 | 2010–2018 |
Locations
| Location | Patents | Span |
|---|---|---|
| Cambridge, Massachusetts, US | 26 | 2008–2015 |
| Princeton Junction, New Jersey, US | 10 | 2014–2021 |