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Inventor

Rajesh Khurana

Inventor
Noida, IN

Overview

4→
Patents
2013–2020
Patent span
Physics
Primary field (CPC G)

Patents· 4 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G01Rprimary
G01RMeasuring electric variables60%
G06FElectric digital data processing40%
PatentTitleYear
10,796,041Compacting test patterns for IJTAG test202010,528,689Verification process for IJTAG based test pattern migration20209,170,301'Hierarchical compaction for test pattern power generation'20158,615,692'Method and system for analyzing test vectors to determine toggle counts'2013

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2013–2020Patents assigned to CADENCE DESIGN SYSTEMS INC (4)· patent assignee history
2013Patents assigned to CHAKRAVADHANULA KRISHNA (1)· patent assignee history
2013Patents assigned to CHICKERMANE VIVEK (1)· patent assignee history
2013Patents assigned to KHURANA RAJESH (1)· patent assignee history
2013–2020Based in Noida, IN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CADENCE DESIGN SYSTEMS INC42013–2020
CHAKRAVADHANULA KRISHNA12013
CHICKERMANE VIVEK12013
KHURANA RAJESHself12013
Locations
LocationPatentsSpan
Noida, IN42013–2020