Inventor
Sipeng Gu
Inventor
Clifton Park, NY, US
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices28%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1022%
H10DInorganic electric semiconductor devices21%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%
G01RMeasuring electric variables2%
B82YSpecific uses or applications of nanostructures1%
G01BMeasuring length, thickness or similar linear dimensions1%
G01NInvestigating or analysing materials by determining their chemical or physical properties1%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%
H01CResistors1%
PatentTitleYear
10,832,839Metal resistors with a non-planar configuration202010,833,067Metal resistor structure in at least one cavity in dielectric over TS contact and gate structure202010,825,811Gate cut first isolation formation with contact forming process mask protection202010,818,557Integrated circuit structure to reduce soft-fail incidence and method of forming same202010,714,380Method of forming smooth sidewall structures using spacer materials202010,580,857Method to form high performance fin profile for 12LP and above202010,446,483Metal-insulator-metal capacitors with enlarged contact areas201910,347,531Middle of the line (MOL) contact formation method and structure201910,347,528Interconnect formation process using wire trench etch prior to via etch, and related interconnect201910,211,317Vertical-transport field-effect transistors with an etched-through source/drain cavity201910,153,211Methods, apparatus, and system for fabricating finFET devices with increased breakdown voltage201810,121,711Planar metrology pad adjacent a set of fins of a fin field effect transistor device201810,068,810Multiple Fin heights with dielectric isolation201810,026,818Field effect transistor structure with recessed interlayer dielectric and method201810,014,296Fin-type field effect transistors with single-diffusion breaks and method20189,666,476'Dimension-controlled via formation processing'20179,502,232'Inhibiting diffusion of elements between material layers of a layered circuit structure'20169,466,701'Processes for preparing integrated circuits with improved source/drain contact structures and integrated circuits prepared according to such processes'20169,305,832'Dimension-controlled via formation processing'20169,281,249'Decoupling measurement of layer thicknesses of a plurality of layers of a circuit structure'20169,184,288'Semiconductor structures with bridging films and methods of fabrication'20159,129,905'Planar metrology pad adjacent a set of fins of a fin field effect transistor device'20159,121,890'Planar metrology pad adjacent a set of fins of a fin field effect transistor device'2015Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2015–2020Patents assigned to GLOBALFOUNDRIES INC (23)· patent assignee history
2015–2020Based in Clifton Park, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES INC | 23 | 2015–2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Clifton Park, New York, US | 23 | 2015–2020 |