Inventor

Zoltan Manyoki

Inventor

Kanata, CA

Overview

21→

Patents

1999–2003

Patent span

Physics

Primary field (CPC G)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores48%

H03KPulse technique21%

H03MCoding10%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%

G01RMeasuring electric variables3%

G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices3%

G05FSystems for regulating electric or magnetic variables3%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%

PatentTitleYear

6,618,306'Semiconductor memory device having row and column redundancy circuit and method of manufacturing the circuit'2003 6,574,132'Circuit configuration for equalizing different voltages on line runs in integrated semiconductor circuits'2003 6,538,950'Integrated memory and corresponding operating method'2003 6,525,974'Integrated memory with redundancy'2003 6,514,780'METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT HAVING A PARTICULAR FUNCTIONALITY REQUIRED BY A USER OF THE CIRCUIT AND HAVING FIRST STRUCTURES TO PRODUCE THE PARTICULAR FUNCTIONALITY AND SECOND STRUCTURES'2003 6,496,423'Chip ID register configuration'2002 6,487,128'Integrated memory having memory cells and reference cells, and operating method for such a memory'2002 6,480,055'Decoder element for generating an output signal having three different potentials and an operating method for the decoder element'2002 6,459,626'Integrated memory having memory cells and reference cells, and corresponding operating method'2002 6,442,100'Integrated memory'2002 6,429,731'CMOS voltage divider'2002 6,426,640'Semiconductor module for burn-in test configuration'2002 6,392,445'Decoder element for producing an output signal having three different potentials'2002 6,353,562'Integrated semiconductor memory with redundant units for memory cells'2002 6,259,641'Integrated memory having sense amplifiers disposed on opposite sides of a cell array'2001 6,255,855'Integrated circuit having a decoder'2001 6,236,607'Integrated memory having a reference potential and operating method for such a memory'2001 6,188,273'Integrated circuit having a contact-making point for selecting an operating mode of the integrated circuit'2001 6,069,486'Circuit configuration for reducing disturbances due to a switching of an output driver'2000 6,008,695'Input amplifier for input signals with steep edges'1999 5,994,944'Level converting circuit having a high switching speed'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2001Patents assigned to SIEMENS AG (4)· patent assignee history

1999–2001Based in Munich, DE· patent location history

2001–2003Patents assigned to INFINEON TECHNOLOGIES AG (16)· patent assignee history

2001Patents assigned to INFINEON TECH GMBH (1)· patent assignee history

2001–2003Based in Kanata, CA· patent location history

2002Based in Mchen, DE· patent location history

2002Based in CDN-Kanada, CA· patent location history

2003Based in Kirchhundern, DE· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INFINEON TECHNOLOGIES AG	16	2001–2003
SIEMENS AG	4	1999–2001
INFINEON TECH GMBH	1	2001

Locations

Location	Patents	Span
Kanata, CA	13	2001–2003
Munich, DE	5	1999–2001
Kirchhundern, DE	1	2003
Mchen, DE	1	2002
CDN-Kanada, CA	1	2002