Inventor

Parsotam T. Patel

Inventor
Austin, TX, US

Overview

17→
Patents
1982–2004
Patent span
Physics
Primary field (CPC G)

Patents· 17 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing48%
H10DInorganic electric semiconductor devices22%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
G11CStatic stores9%
H03KPulse technique9%
PatentTitleYear
6,832,277'Method and apparatus for transmitting data that utilizes delay elements to reduce capacitive coupling'20046,735,754'Method and apparatus to facilitate global routing for an integrated circuit layout'20046,694,502'Data structure for fine-grid multi-level VLSI routing and method for storing the data structure in a computer readable medium'20046,601,222'Coupled noise estimation and avoidance of noise-failure using global routing information'20036,467,069'Timing closure and noise avoidance in detailed routing'20026,415,422'Method and system for performing capacitance estimations on an integrated circuit design routed by a global routing tool'20026,360,350'Method and system for performing circuit analysis on an integrated-circuit design having design data available in different forms'20026,230,302'Method and system for performing timing analysis on an integrated circuit design'20016,218,631'Structure for reducing cross-talk in VLSI circuits and method of making same using filled channels to minimize cross-talk'20015,831,870'Method and system for characterizing interconnect data within an integrated circuit for facilitating parasitic capacitance estimation'19985,764,532'Automated method and system for designing an optimized integrated circuit'19985,649,170'Interconnect and driver optimization for high performance processors'19975,045,913'Bit stack compatible input/output circuits'19914,988,636'Method of making bit stack compatible input/output circuits'19914,446,611'Method of making a saturation-limited bipolar transistor device'19844,390,890'Saturation-limited bipolar transistor device'19834,363,110'Non-volatile dynamic RAM cell'1982

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1982–2003Patents assigned to IBM (14)· patent assignee history
1982–1991Based in Round Rock, TX, US· patent location history
1997–2004Based in Austin, TX, US· patent location history
2004Patents assigned to SUN MICROSYSTEMS INC (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM141982–2003
SUN MICROSYSTEMS INC32004
Locations
LocationPatentsSpan
Austin, Texas, US121997–2004
Round Rock, Texas, US51982–1991