Inventor

Michael Fairman

Inventor
Santa Cruz, CA, US

Overview

21→
Patents
2004–2021
Patent span
Physics
Primary field (CPC G)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing43%
G01CMeasuring distances, levels or bearings13%
B60GVehicle suspension arrangements10%
B60JWindows, windscreens, non-fixed roofs, doors, or similar devices for vehicles10%
H04SStereophonic systems10%
G01RMeasuring electric variables8%
B60KArrangement or mounting of propulsion units or of transmissions in vehicles3%
H04LTransmission of digital information, e.g. telegraphic communication3%
H04MTelephonic communication3%
PatentTitleYear
11,068,064Method of selecting an application target window in a user interface202110,901,515Vehicular interface system for launching an application202110,180,727Method of launching an application and selecting the application target window201910,019,066Method of launching an application and selecting the application target window20188,818,624'Adaptive soft buttons for a vehicle user interface'20148,473,274'Providing component connection information'20138,320,578'Headset'20128,191,035'Tool with graphical interconnect matrix'20128,156,455'Methods and apparatus for implementing parameterizable processors and peripherals'20128,132,132'Methods and apparatus for implementing parameterizable processors and peripherals'20128,037,434'Methods and apparatus for implementing parameterizable processors and peripherals'20117,813,914'Providing component connection information'20107,802,221'Design tool with graphical interconnect matrix'20107,676,784'Methods and apparatus for implementing parameterizable processors and peripherals'20107,675,931'Methods and apparatus for controlling multiple master/slave connections'20107,512,849'Reconfigurable programmable logic system with configuration recovery mode'20097,225,285'Assigning interrupts in multi-master systems'20077,010,666'Methods and apparatus for memory map generation on a programmable chip'20067,000,161'Reconfigurable programmable logic system with configuration recovery mode'20066,976,239'Methods and apparatus for implementing parameterizable processors and peripherals'20056,754,862'Gaining access to internal nodes in a PLD'2004

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2004–2013Patents assigned to ALTERA CORP (14)· patent assignee history
2004–2021Based in Santa Cruz, CA, US· patent location history
2012–2014Patents assigned to FAIRMAN MICHAEL (4)· patent assignee history
2012Patents assigned to PRITCHARD JEFFREY ORION (3)· patent assignee history
2014–2019Patents assigned to TESLA MOTORS INC (3)· patent assignee history
2018–2021Patents assigned to TESLA INC (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
ALTERA CORP142004–2013
FAIRMAN MICHAELself42012–2014
TESLA INC42018–2021
PRITCHARD JEFFREY ORION32012
TESLA MOTORS INC32014–2019
Locations
LocationPatentsSpan
Santa Cruz, California, US212004–2021