Inventor

Robert S. Green

Inventor
Boise, ID, US

Overview

25→
Patents
1976–2010
Patent span
Physics
Primary field (CPC G)

Patents· 25 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G01Rprimary
G01RMeasuring electric variables15%
G06FElectric digital data processing12%
G11CStatic stores9%
A23LFoods, foodstuffs or non-alcoholic beverages, not otherwise provided for6%
A61HPhysical therapy apparatus, e.g. devices for locating or stimulating reflex points in the body6%
G05FSystems for regulating electric or magnetic variables6%
H03HImpedance networks, e.g. resonant circuits6%
H03KPulse technique6%
H10DInorganic electric semiconductor devices6%
B08BCleaning in general3%
PatentTitleYear
7,788,430'Enhanced single-node protocol for data, address and control operations'20106,551,630'Genera Prunus endocarp dietary supplement'20036,486,730'Voltage down pump and method of operation'20026,392,576'Multiplierless interpolator for a delta-sigma digital to analog converter'20026,355,250'Use of genera prunus endocarp as a dietary supplement'20026,313,773'Multiplierless interpolator for a delta-sigma digital to analog converter'20016,310,556'Apparatus and method for detecting a low-battery power condition and generating a user perceptible warning'20016,240,193'Two line variable word length serial interface'20016,091,079'Semiconductor wafer'20005,907,299'Analog-to digital converter with delta-sigma modulator'19995,483,175'Method for circuits connection for wafer level burning and testing of individual dies on semiconductor wafer'19965,457,400'Semiconductor array having built-in test circuit for wafer level testing'19955,424,651'Fixture for burn-in testing of semiconductor wafers, and a semiconductor wafer'19955,333,604'Patella exercising apparatus'19945,327,394'Timing and control circuit for a static RAM responsive to an address transition pulse'19945,280,783'Continuous passive motion device for full extension of leg'19945,280,205'Fast sense amplifier'19945,241,266'Built-in test circuit connection for wafer level burnin and testing of individual dies'19934,720,263'Transportable system for providing heat to flowing materials'19884,472,871'Method of making a plurality of MOSFETs having different threshold voltages'19844,283,642'Regulation of current through depletion devices in a MOS integrated circuit'19814,142,114'Integrated circuit with threshold regulation'19794,135,102'High performance inverter circuits'19793,969,706'Dynamic random access memory misfet integrated circuit'19763,942,396'Cartridge case extracting tool'1976

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1976–1984Patents assigned to MOSTEK CORP (4)· patent assignee history
1976–1984Based in Richardson, TX, US· patent location history
1993–2000Patents assigned to MICRON TECHNOLOGY INC (6)· patent assignee history
1993–2000Based in Boise, ID, US· patent location history
1994Patents assigned to SUTTER CORP (2)· patent assignee history
1999–2002Based in Sandy, UT, US· patent location history
2001–2002Patents assigned to SONIC INNOVATIONS INC (5)· patent assignee history
2001–2002Based in Salt Lake City, UT, US· patent location history
2002–2003Patents assigned to INTEGRATED BIOMOLECULE CORP (2)· patent assignee history
2002–2010Based in Tucson, AZ, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MICRON TECHNOLOGY INC61993–2000
SONIC INNOVATIONS INC52001–2002
MOSTEK CORP41976–1984
INTEGRATED BIOMOLECULE CORP22002–2003
SUTTER CORP21994
Locations
LocationPatentsSpan
Boise, ID, US71993–2000
Sandy, UT, US41999–2002
Richardson, Texas, US41976–1984
Tucson, AZ, US32002–2010
Salt Lake City, UT, US22001–2002