Inventor
Siva Kanakasabapathy
Inventor
Pleasanton, CA, US
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices25%
H10DInorganic electric semiconductor devices25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1023%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
H01JElectric discharge tubes or discharge lamps4%
H10BElectronic memory devices4%
B08BCleaning in general2%
B82YSpecific uses or applications of nanostructures2%
C23CCoating metallic material2%
PatentTitleYear
11,133,189Metal cut patterning and etching to minimize interlayer dielectric layer loss202111,054,250Multi-channel overlay metrology202111,024,715FinFET gate cut after dummy gate removal202110,741,660Nanosheet single gate (SG) and extra gate (EG) field effect transistor (FET) co-integration202010,734,234Metal cut patterning and etching to minimize interlayer dielectric layer loss202010,692,990Gate cut in RMG202010,644,129Gate cut in RMG202010,622,482Gate cut using selective deposition to prevent oxide loss202010,600,868FinFET gate cut after dummy gate removal202010,553,700Gate cut in RMG202010,504,798Gate cut in replacement metal gate process201910,347,540Gate cut using selective deposition to prevent oxide loss201910,229,854FinFET gate cut after dummy gate removal201910,167,558Phase shifted gas delivery for high throughput and cost effectiveness associated with atomic layer etching and atomic layer deposition20199,627,263'Stop layer through ion implantation for etch stop'20177,820,552'Advanced high-k gate stack patterning and structure containing a patterned high-k gate stack'20106,676,800'Particle contamination cleaning from substrates using plasmas, reactive gases, and mechanical agitation'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004Patents assigned to APPLIED MATERIALS INC (1)· patent assignee history
2004Based in Richardson, TX, US· patent location history
2010–2021Patents assigned to IBM (13)· patent assignee history
2010Based in Hopewell Junction, NY, US· patent location history
2017Based in Armonk, NY, US· patent location history
2019Patents assigned to GLOBALFOUNDRIES INC (1)· patent assignee history
2019–2021Based in Pleasanton, CA, US· patent location history
2020–2021Patents assigned to TESSERA INC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 13 | 2010–2021 |
| TESSERA INC | 2 | 2020–2021 |
| APPLIED MATERIALS INC | 1 | 2004 |
| GLOBALFOUNDRIES INC | 1 | 2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| Pleasanton, California, US | 14 | 2019–2021 |
| Armonk, New York, US | 1 | 2017 |
| Hopewell Junction, New York, US | 1 | 2010 |
| Richardson, Texas, US | 1 | 2004 |