Inventor
Masahiro Tokoro
Inventor
Kanagawa, JP
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
7,613,884'Multiprocessor system and method ensuring coherency between a main memory and a cache memory'20097,051,177'Method for measuring memory latency in a hierarchical memory system'20067,047,398'Analyzing instruction completion delays in a processor'20066,970,999'Counting latencies of an instruction table flush, refill and instruction execution using a plurality of assigned counters'20056,910,120'Speculative counting of performance events with rewind counter'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2006Patents assigned to IBM (4)· patent assignee history
2005–2006Based in Kanagawa, JP· patent location history
2009Patents assigned to HITACHI LTD (1)· patent assignee history
2009Based in Philadelphia, PA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 4 | 2005–2006 |
| HITACHI LTD | 1 | 2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kanagawa, JP | 4 | 2005–2006 |
| Philadelphia, Pennsylvania, US | 1 | 2009 |