Inventor
Masahide Inuishi
Inventor
Hyogo, JP
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices33%
H10BElectronic memory devices24%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests22%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
PatentTitleYear
6,420,763'Semiconductor device having a retrograde well structure and method of manufacturing thereof'20025,852,327'Semiconductor device'19985,648,284'Field effect transistor including silicon oxide film and nitrided oxide film as gate insulator film and manufacturing method thereof'19975,554,876'Field effect transistor including silicon oxide film and nitrided oxide film as gate insulator film and manufacturing method thereof'19965,536,665'Method of manufacturing a semiconductor device with double structured well'19965,446,305'Semiconductor device with double structured well'19955,369,297'Field effect transistor including silicon oxide film and nitrided oxide film as gate insulator film and manufacturing method thereof'19945,268,321'Method of making DRAM cell having improved radiation protection'19935,258,321'Manufacturing method for semiconductor memory device having stacked trench capacitors and improved intercell isolation'19935,258,319'Method of manufacturing a MOS type field effect transistor using an oblique ion implantation step'19935,217,913'Method of manufacturing an MIS device having lightly doped drain structure and conductive sidewall spacers'19935,200,918'Static semiconductor memory with polysilicon source drain transistors'19935,200,353'Method of manufacturing a semiconductor device having trench capacitor'19935,183,771'Method of manufacturing LDDFET having double sidewall spacers'19935,166,763'Static type semiconductor memory device and method of manufacturing thereof'19925,146,291'MIS device having lightly doped drain structure'19925,089,865'MIS semiconductor device'19925,061,975'MOS type field effect transistor having LDD structure'19915,023,682'Semiconductor memory device'19914,942,448'Structure for isolating semiconductor components on an integrated circuit and a method of manufacturing therefor'19904,918,500'Semiconductor device having trench capacitor and manufacturing method therefor'19904,702,797'Method of manufacturing semiconductor memory device'1987Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1987–2002Patents assigned to MITSUBISHI ELECTRIC CORP (22)· patent assignee history
1987–1997Based in Hyogo, JP· patent location history
1998–2002Based in Tokyo, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MITSUBISHI ELECTRIC CORP | 22 | 1987–2002 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hyogo, JP | 20 | 1987–1997 |
| Tokyo, JP | 2 | 1998–2002 |