Inventor

Kuo-Ji Chen

Inventor

Taipei, TW

Overview

2006–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 47 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices27%

H01LSemiconductor devices25%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%

H03KPulse technique12%

H02HEmergency protective circuit arrangements11%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%

G06FElectric digital data processing3%

G01RMeasuring electric variables1%

Y02PClimate change mitigation technologies in the production or processing of goods1%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%

PatentTitleYear

10,872,190Method and system for latch-up prevention2020 10,868,112Circuit device including guard ring and method of forming guard ring2020 10,741,543Device including integrated electrostatic discharge protection component2020 10,510,692Semiconductor device including dummy conductive cells2019 10,284,190Voltage detector circuits and methods2019 10,128,329Method of forming guard ring structure2018 10,043,767Semiconductor device including dummy conductive cells2018 9,831,235Method of making structure having a gate stack2017 9,799,644'FinFET and transistors with resistors and protection against electrostatic discharge (ESD)'2017 9,762,052'Circuit and method of electrically decoupling nodes'2017 9,659,923'Electrostatic discharge (ESD) protection circuits, integrated circuits, systems, and methods for forming the ESD protection circuits'2017 9,647,452'Electrostatic discharge protection for level-shifter circuit'2017 9,608,616'Power clamp circuits and methods'2017 9,502,892'Electrostatic discharge protection circuit and related method'2016 9,478,533'Method and apparatus for forming an integrated circuit with a metalized resistor in a standard cell configuration'2016 9,472,545'Semiconductor arrangement with electrostatic discharge (ESD) protection'2016 9,466,978'Electrostatic discharge protection for level-shifter circuit'2016 9,450,044'Guard ring structure and method of forming the same'2016 9,425,616'RC triggered ESD protection device'2016 9,425,247'Metal-insulator-metal capacitor with current leakage protection'2016 9,406,815'Adding decoupling function for TAP cells'2016 9,385,241'Electrostatic discharge (ESD) protection circuits, integrated circuits, systems, and methods for forming the ESD protection circuits'2016 9,293,606'Semiconductor device with seal ring with embedded decoupling capacitor'2016 9,184,586'SiGe based gate driven PMOS trigger circuit'2015 9,178,008'Metal-insulator-metal capacitor with current leakage protection'2015 9,124,086'Failsafe ESD protection'2015 9,117,677'Semiconductor integrated circuit having a resistor and method of forming the same'2015 9,082,886'Adding decoupling function for tap cells'2015 9,082,623'FinFET and transistors with resistors and protection against electrostatic discharge (ESD)'2015 9,035,393'Method and apparatus for forming an integrated circuit with a metalized resistor in a standard cell configuration'2015 9,026,973'System and method for arbitrary metal spacing for self-aligned double patterning'2015 8,943,454'In-phase grouping for voltage-dependent design rule'2015 8,940,596'Method of making structure having a gate stack'2015 8,743,515'ESD clamp with novel RC triggered circuit'2014 8,648,425'Resistors formed based on metal-oxide-semiconductor structures'2014 8,587,074'Device having a gate stack'2013 8,179,647'ESD power clamp for high-voltage applications'2012 8,059,376'ESD clamp for high voltage operation'2011 7,969,699'ESD protection trigger circuit'2011 7,884,643'Low leakage voltage level shifting circuit'2011 7,545,175'Slew rate controlled digital output buffer without resistors'2009 7,271,627'High voltage tolerant input buffer operable in under-drive conditions'2007 7,248,076'Dual-voltage three-state buffer circuit with simplified tri-state level shifter'2007 7,205,823'Oscillating buffer with single gate oxide devices'2007 7,193,441'Single gate oxide I/O buffer with improved under-drive feature'2007 7,173,472'Input buffer structure with single gate oxide'2007 7,151,391'Integrated circuit for level-shifting voltage levels'2006

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2006–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (21)· patent assignee history

2006–2017Based in Wu-Ku, TW· patent location history

2007–2020Based in Taipei, TW· patent location history

2007–2020Based in Hsinchu, TW· patent location history

2011–2016Patents assigned to CHEN KUO-JI (13)· patent assignee history

2012–2015Patents assigned to CHU FANG-TSUN (2)· patent assignee history

2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (26)· patent assignee history

2015–2016Patents assigned to Ma wei yu (3)· patent assignee history

2018–2020Based in New Taipei, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	26	2015–2020
TAIWAN SEMICONDUCTOR MFG	21	2006–2016
CHEN KUO-JIself	13	2011–2016
Ma wei yu	3	2015–2016
CHU FANG-TSUN	2	2012–2015

Locations

Location	Patents	Span
Taipei, TW	22	2007–2020
Wu-Ku, TW	19	2006–2017
Hsinchu, TW	3	2007–2020
New Taipei, TW	3	2018–2020