Inventor

Cheng-Hsu Hsiao

Inventor

Taichung, TW

Overview

2002–2019

Patent span

Electricity

Primary field (CPC H)

Patents· 58 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1071%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%

LOC145%

H01LSemiconductor devices3%

H05KPrinted circuits3%

H10DInorganic electric semiconductor devices3%

H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation3%

G11CStatic stores1%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%

PatentTitleYear

10,242,972Package structure and fabrication method thereof2019 8,895,366'Fabrication method of semiconductor package'2014 8,698,326'Semiconductor package and fabrication method thereof'2014 8,420,521'Method for fabricating stack structure of semiconductor packages'2013 8,361,843'Method for fabricating heat dissipation package structure'2013 8,207,620'Flip-chip semiconductor package and chip carrier for preventing corner delamination'2012 8,183,092'Method of fabricating stacked semiconductor structure'2012 8,062,933'Method for fabricating heat dissipating package structure'2011 8,058,100'Method for fabricating chip scale package structure with metal pads exposed from an encapsulant'2011 8,013,436'Heat dissipation package structure and method for fabricating the same'2011 8,008,769'Heat-dissipating semiconductor package structure and method for manufacturing the same'2011 7,993,967'Semiconductor package fabrication method'2011 7,981,729'Fabrication method of multi-chip stack structure'2011 7,855,443'Stack structure of semiconductor packages and method for fabricating the stack structure'2010 7,772,685'Stacked semiconductor structure and fabrication method thereof'2010 7,768,106'Multi-chip stack structure and fabrication method thereof'2010 7,759,170'Fabrication method of semiconductor package having heat dissipation device'2010 7,750,467'Chip scale package structure with metal pads exposed from an encapsulant'2010 7,745,262'Heat dissipating package structure and method for fabricating the same'2010 7,732,913'Semiconductor package substrate'2010 7,713,846'Process applied to semiconductor'2010 7,679,178'Semiconductor package on which a semiconductor device can be stacked and fabrication method thereof'2010 7,671,466'Semiconductor package having heat dissipating device with cooling fluid'2010 7,666,716'Fabrication method of semiconductor package'2010 7,638,879'Semiconductor package and fabrication method thereof'2009 7,615,862'Heat dissipating package structure and method for fabricating the same'2009 7,608,915'Heat dissipation semiconductor package'2009 7,564,140'Semiconductor package and substrate structure thereof'2009 7,489,044'Semiconductor package and fabrication method thereof'2009 7,485,496'Semiconductor device package with a heat sink and method for fabricating the same'2009 7,445,957'Method for fabricating wafer level semiconductor package with build-up layer'2008 7,364,944'Method for fabricating thermally enhanced semiconductor package'2008 7,348,211'Method for fabricating semiconductor packages'2008 RE039957'Method of making semiconductor package with heat spreader'2007 7,271,483'Bump structure of semiconductor package and method for fabricating the same'2007 7,205,642'Semiconductor package and method for fabricating the same'2007 7,196,414'Semiconductor package with heat sink'2007 7,177,155'Semiconductor package with heat sink'2007 7,170,152'Wafer level semiconductor package with build-up layer and method for fabricating the same'2007 7,132,312'Method for fabricating semiconductor package having conductive bumps on chip'2006 D0529031'IC card type circuit module'2006 7,074,645'Fabrication method of semiconductor package with heat sink'2006 7,019,406'Thermally enhanced semiconductor package'2006 7,005,720'Semiconductor package with photosensitive chip and fabrication method thereof'2006 7,002,245'Semiconductor package having conductive bumps on chip and method for fabricating the same'2006 6,989,296'Fabrication method of semiconductor package with photosensitive chip'2006 6,963,135'Semiconductor package for memory chips'2005 6,919,630'Semiconductor package with heat spreader'2005 6,856,015'Semiconductor package with heat sink'2005 6,849,942'Semiconductor package with heat sink attached to substrate'2005 6,844,622'Semiconductor package with heat sink'2005 D0498760'Digital memory card'2004 D0493799'Digital memory card'2004 D0492314'IC card type circuit module'2004 6,650,006'Semiconductor package with stacked chips'2003 6,541,870'Semiconductor package with stacked chips'2003 6,458,626'Fabricating method for semiconductor package'2002 6,444,498'Method of making semiconductor package with heat spreader'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002–2019Patents assigned to SILICONWARE PRECISION INDUSTRIES CO LTD (56)· patent assignee history

2002–2011Based in Nantou County, TW· patent location history

2004–2019Based in Taichung, TW· patent location history

2010Based in Nanto, TW· patent location history

2011–2014Patents assigned to HSIAO CHENG-HSU (7)· patent assignee history

2011–2013Patents assigned to HUANG CHIEN-PING (4)· patent assignee history

2011–2013Patents assigned to PU HAN-PING (3)· patent assignee history

2013–2014Patents assigned to TSAI HO-YI (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
SILICONWARE PRECISION INDUSTRIES CO LTD	56	2002–2019
HSIAO CHENG-HSUself	7	2011–2014
HUANG CHIEN-PING	4	2011–2013
PU HAN-PING	3	2011–2013
TSAI HO-YI	3	2013–2014

Locations

Location	Patents	Span
Taichung, TW	49	2004–2019
Nantou County, TW	8	2002–2011
Nanto, TW	1	2010