Inventor

Bert H. Tanaka

Inventor
Saratoga, CA, US

Overview

21→
Patents
2008–2018
Patent span
Electricity
Primary field (CPC H)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication87%
G06FElectric digital data processing4%
H04JMultiplex communication4%
H04QSelecting4%
PatentTitleYear
9,948,576Mechanism for enabling layer two host addresses to be shielded from the switches in a network20189,825,866'Selecting among multiple concurrently active paths through a network'20179,325,526'Mechanism for enabling layer two host addresses to be shielded from the switches in a network'20169,276,861'Selecting among multiple concurrently active paths through a network'20168,917,604'Performing rate limiting within a network'20148,873,424'Adaptive load balancing'20148,660,007'Performing rate limiting within a network'20148,565,115'Adaptive load balancing'20138,498,293'Mechanism for enabling layer two host addresses to be shielded from the switches in a network'20138,374,089'Performing rate limiting within a network'20138,339,987'Determining a congestion metric for a path in a network'20128,331,227'Determining link failure within a network'20128,223,634'Mechanism for implementing load balancing in a network'20128,130,644'Mechanism for enabling load balancing to be achieved in a loop-free switching path, reverse path learning network'20128,125,996'Mechanism for enabling layer two host addresses to be shielded from the switches in a network'20127,957,374'Mechanism for enabling layer two host addresses to be shielded from the switches in a network'20117,774,461'Mechanism for determining a congestion metric for a path in a network'20107,702,742'Mechanism for enabling memory transactions to be conducted across a lossy network'20107,630,358'Mechanism for implementing multiple logical routers within a single physical router'20097,463,588'Mechanism for enabling load balancing to be achieved in a loop-free switching path, reverse path learning network'20087,389,046'Simplified switching interconnect using wavelength division multiplexing'2008

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2008Patents assigned to WOVEN SYSTEMS INC (2)· patent assignee history
2008–2018Based in Saratoga, CA, US· patent location history
2010–2018Patents assigned to FORTINET INC (18)· patent assignee history
2012–2013Patents assigned to MIHELICH JOSEPH R (7)· patent assignee history
2012–2013Patents assigned to TANAKA BERT H (7)· patent assignee history
2012–2013Patents assigned to MALTBIE DANIEL J (5)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
FORTINET INC182010–2018
MIHELICH JOSEPH R72012–2013
TANAKA BERT Hself72012–2013
MALTBIE DANIEL J52012–2013
WOVEN SYSTEMS INC22008
Locations
LocationPatentsSpan
Saratoga, California, US212008–2018