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Inventor

Ashis Maitra

Inventor
New Delhi, IN

Overview

3→
Patents
2009–2016
Patent span
Electricity
Primary field (CPC H)

Patents· 3 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing33%
H03KPulse technique33%
H04JMultiplex communication33%
PatentTitleYear
9,455,691'Flip-flop cell with configurable delay'20169,292,651'System for partitioning integrated circuit design based on timing slack'20167,613,213'Time multiplexed SONET line processing'2009

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2009–2016Based in New Delhi, IN· patent location history
2016Patents assigned to FREESCALE SEMICONDUCTOR INC (2)· patent assignee history
2016Patents assigned to MAITRA ASHIS (2)· patent assignee history
2016Patents assigned to DEY AMIT KUMAR (1)· patent assignee history
2016Patents assigned to GOYAL GAURAV (1)· patent assignee history
2016Patents assigned to MISHRA ATEET (1)· patent assignee history
2016Based in Bangalore, IN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
FREESCALE SEMICONDUCTOR INC22016
MAITRA ASHISself22016
DEY AMIT KUMAR12016
GOYAL GAURAV12016
MISHRA ATEET12016
Locations
LocationPatentsSpan
New Delhi, IN22009–2016
Bangalore, IN12016