Inventor
Colin D. Yates
Inventor
Clackamas, OR, US
Overview
Patents· 10 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G03Fprimary
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices29%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1029%
B82YSpecific uses or applications of nanostructures12%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1012%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests12%
G06FElectric digital data processing6%
PatentTitleYear
8,343,373'Method of aligning nanotubes and wires with an etched feature'20137,858,979'Method of aligning deposited nanotubes onto an etched feature using a spacer'20107,575,693'Method of aligning nanotubes and wires with an etched feature'20097,541,216'Method of aligning deposited nanotubes onto an etched feature using a spacer'20097,313,508'Process window compliant corrections of design layout'20077,016,041'Reticle overlay correction'20066,809,824'Alignment process for integrated circuit structures on semiconductor substrate using scatterometry measurements of latent images in spaced apart test fields on substrate'20046,458,508'Method of protecting acid-catalyzed photoresist from chip-generated basic contaminants'20026,425,117'System and method for performing optical proximity correction on the interface between optical proximity corrected cells'20025,863,825'Alignment mark contrast enhancement'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2006Patents assigned to LSI LOGIC CORP (5)· patent assignee history
1999–2004Based in San Jose, CA, US· patent location history
2006–2013Based in Clackamas, OR, US· patent location history
2007Patents assigned to LSI CORP (1)· patent assignee history
2009–2013Patents assigned to NANTERO INC (4)· patent assignee history
2013Patents assigned to YATES COLIN D (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LSI LOGIC CORP | 5 | 1999–2006 |
| NANTERO INC | 4 | 2009–2013 |
| LSI CORP | 1 | 2007 |
| YATES COLIN Dself | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Clackamas, OR, US | 6 | 2006–2013 |
| San Jose, California, US | 4 | 1999–2004 |