Inventor
Zihui Wang
Inventor
Milpitas, CA, US
Overview
Patents· 42 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores18%
H01LSemiconductor devices18%
H10NElectric solid-state devices not otherwise provided for17%
H10BElectronic memory devices13%
H01FMagnets10%
B82YSpecific uses or applications of nanostructures9%
H10DInorganic electric semiconductor devices9%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%
G01RMeasuring electric variables1%
PatentTitleYear
D0915512Vending machine202110,727,400Magnetic random access memory with perpendicular enhancement layer202010,720,469Multilayered seed structure for magnetic memory element including a CoFeB seed layer2020RE047975Perpendicular magnetic tunnel junction (pMTJ) with in-plane magneto-static switching-enhancing layer202010,490,737Magnetic memory element including magnesium perpendicular enhancement layer201910,438,997Multilayered seed structure for magnetic memory element including a CoFeB seed layer201910,361,362Magnetic random access memory with ultrathin reference layer201910,153,017Method for sensing memory element coupled to selector device201810,090,456Magnetic memory element including oxide/metal composite layers formed adjacent to fixed layer201810,032,979Magnetic memory element with iridium anti-ferromagnetic coupling layer201810,008,540Spin-orbitronics device and applications thereof201810,008,663Perpendicular magnetic fixed layer with high anisotropy20189,871,190'Magnetic random access memory with ultrathin reference layer'20189,871,191'Magnetic random access memory with ultrathin reference layer'20189,831,421Magnetic memory element with composite fixed layer20179,748,471'Perpendicular magnetic memory element having magnesium oxide cap layer'20179,679,625'Perpendicular magnetic tunnel junction (pMTJ) with in-plane magneto-static switching-enhancing layer'20179,647,202'Magnetic random access memory with perpendicular enhancement layer'20179,647,032'Spin-orbitronics device and applications thereof'20179,634,244'Magnetic random access memory with perpendicular interfacial anisotropy'20179,608,038'Magnetic tunnel junction (MTJ) memory element having tri-layer perpendicular reference layer'20179,559,144'Magnetic random access memory element having tantalum perpendicular enhancement layer'20179,548,334'Magnetic tunnel junction with perpendicular enhancement layer and thin reference layer'20179,543,506'Magnetic random access memory with tri-layer reference layer'20179,502,092'Unipolar-switching perpendicular MRAM and method for using same'20169,443,577'Voltage-switched magnetic random access memory (MRAM) and method for using the same'20169,396,781'Magnetic random access memory having perpendicular composite reference layer'20169,337,417'Magnetic random access memory with perpendicular interfacial anisotropy'20169,306,154'Magnetic random access memory with perpendicular enhancement layer'20169,252,187'Devices and methods for measurement of magnetic characteristics of MRAM wafers using magnetoresistive test strips'20169,231,027'Magnetic random access memory having perpendicular enhancement layer and interfacial anisotropic free layer'20169,166,146'Electric field assisted MRAM and method for using the same'20159,082,951'Magnetic random access memory with perpendicular enhancement layer'20159,070,855'Magnetic random access memory having perpendicular enhancement layer'20159,070,692'Shields for magnetic memory chip packages'20158,891,292'Magnetoresistive layer structure with voltage-induced switching and logic cell application'20148,891,291'Magnetoresistive logic cell and method of use'20148,885,395'Magnetoresistive logic cell and method of use'20148,879,309'Method and apparatus for programming a spin-transfer torque magnetic random access memory (STTMRAM) array'20148,836,061'Magnetic tunnel junction with non-metallic layer adjacent to free layer'20148,806,284'Method for bit-error rate testing of resistance-based RAM cells using a reflected signal'20148,611,145'Spin-transfer torque magnetic random access memory (STTMRAM) device with shared transistor and minimal written data disturbance'2013Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2013–2020Patents assigned to AVALANCHE TECHNOLOGY INC (41)· patent assignee history
2013–2019Based in Milpitas, CA, US· patent location history
2014Patents assigned to HUAI YIMING (2)· patent assignee history
2014Patents assigned to WANG ZIHUI (2)· patent assignee history
2014Patents assigned to ZHOU YUCHEN (2)· patent assignee history
2014Patents assigned to MALMHALL ROGER K (1)· patent assignee history
2014–2016Based in Fremont, CA, US· patent location history
2019–2020Based in Mountain View, CA, US· patent location history
2020Based in San Jose, CA, US· patent location history
2021Based in Guangdong, CN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| AVALANCHE TECHNOLOGY INC | 41 | 2013–2020 |
| HUAI YIMING | 2 | 2014 |
| WANG ZIHUIself | 2 | 2014 |
| ZHOU YUCHEN | 2 | 2014 |
| MALMHALL ROGER K | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Milpitas, California, US | 30 | 2013–2019 |
| Fremont, California, US | 6 | 2014–2016 |
| Mountain View, California, US | 3 | 2019–2020 |
| San Jose, California, US | 2 | 2020 |
| Guangdong, CN | 1 | 2021 |