Inventor

Susumu Tanida

Inventor

Hyogo, JP

Overview

1996–2012

Patent span

Physics

Primary field (CPC G)

Patents· 18 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores58%

G06FElectric digital data processing15%

G01RMeasuring electric variables8%

H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems8%

B82YSpecific uses or applications of nanostructures4%

G05FSystems for regulating electric or magnetic variables4%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%

PatentTitleYear

8,248,154'Charge pump circuit'2012 7,902,909'Charge pump circuit'2011 6,798,679'Semiconductor memory module'2004 6,777,920'Internal power-supply potential generating circuit'2004 6,337,814'Semiconductor memory device having reference potential generating circuit'2002 6,285,602'Semiconductor memory device provided with I/O clamp circuit'2001 6,269,044'Semiconductor memory device employing an abnormal current consumption detection scheme'2001 6,034,904'Semiconductor memory device having selection circuit for arbitrarily setting a word line to selected state at high speed in test mode'2000 6,031,782'Semiconductor memory device provided with an interface circuit consuming a reduced amount of current consumption'2000 5,962,868'Semiconductor device having contact check circuit'1999 5,905,690'Synchronous semiconductor device having circuitry capable of surely resetting test mode'1999 5,715,212'Semiconductor memory device comprising address transition detecting circuit having stable response characteristic for address signal conversion'1998 5,694,352'Semiconductor memory device having layout area of periphery of output pad reduced'1997 5,666,317'Semiconductor memory device'1997 5,631,867'Semiconductor storage device requiring short time for program voltage to rise'1997 5,587,956'Semiconductor memory device having function of generating boosted potential'1996 5,574,691'Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test'1996 5,519,659'Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test'1996

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1996–2002Patents assigned to MITSUBISHI ELECTRIC CORP (14)· patent assignee history

1996–2004Based in Hyogo, JP· patent location history

1997–2000Patents assigned to MITSUBISHI ELECTRIC ENG (2)· patent assignee history

2001–2012Based in Tokyo, JP· patent location history

2004Patents assigned to RENESAS TECH CORP (2)· patent assignee history

2011–2012Patents assigned to RENESAS ELECTRONICS CORP (2)· patent assignee history

2012Patents assigned to SUZUKI TAKANOBU (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
MITSUBISHI ELECTRIC CORP	14	1996–2002
MITSUBISHI ELECTRIC ENG	2	1997–2000
RENESAS ELECTRONICS CORP	2	2011–2012
RENESAS TECH CORP	2	2004
SUZUKI TAKANOBU	1	2012

Locations

Location	Patents	Span
Hyogo, JP	15	1996–2004
Tokyo, JP	3	2001–2012