Inventor

KUO-FENG YU

Inventor
TW

Overview

58→
Patents
2021–2026
Patent span
Electricity
Primary field (CPC H)

Patents· 58 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices34%
H01LSemiconductor devices28%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1017%
B82YSpecific uses or applications of nanostructures12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H10BElectronic memory devices3%
PatentTitleYear
12,593,496Multiple threshold voltage implementation through lanthanum incorporation202612,575,172Metal gate electrode formation of memory devices202612,550,374Semiconductor device and formation method thereof202612,538,571Transistor gate structures and methods of forming the same202612,477,813Metal gates for multi-gate semiconductor devices and method thereof202512,469,710Method of manufacturing a semiconductor device202512,463,040Methods for doping high-K metal gates for tuning threshold voltages202512,453,165P-type semiconductor devices with different threshold voltages and methods of forming the same202512,444,608Structure having gate spacers with projecting portions extending into a gate dielectric202512,433,011Post gate dielectric processing for semiconductor device fabrication202512,426,309Method of manufacturing semiconductor devices and semiconductor devices202512,414,329Forming low-resistance capping layer over metal gate electrode202512,324,216Metal gates for multi-gate devices and fabrication methods thereof202512,317,574Device providing multiple threshold voltages and methods of making the same202512,302,627Semiconductor device with non-conformal gate dielectric layers202512,266,575Multiple gate field-effect transistors having various gate oxide thicknesses and methods of forming the same202512,255,104Semiconductor device and method of manufacture202512,230,713Semiconductor device structure and methods of forming the same202512,218,213Semiconductor device structure and method for forming the same202512,170,327Semiconductor structure and manufacturing method of the same202412,171,091Multi-layer high-k gate dielectric structure202412,154,964Metal gates with layers for transistor threshold voltage tuning and methods of forming the same202412,142,657Gate structure for multi-gate device and related methods202412,142,640Semiconductor structures with multiple threshold voltage offerings and methods thereof202412,142,663Method for forming source/drain contacts202412,132,107Semiconductor structure and methods of forming same202412,119,390Gate spacer structures and methods for forming the same202412,119,389Semiconductor device with reduced trap defect and method of forming the same202412,094,948Forming low-resistance capping layer over metal gate electrode202412,074,206Integrated circuit device with improved reliability202412,068,392FinFET fabrication methods202412,068,371Method for FinFET LDD doping202412,057,486Metal gate cap202412,041,760Multi-layer high-k gate dielectric structure202412,040,235Semiconductor device and method of manufacture202412,022,643Multi-layer high-k gate dielectric structure202412,009,400Device providing multiple threshold voltages and methods of making the same202411,972,982Method of manufacturing a semiconductor device202411,908,745Semiconductor device with non-conformal gate dieletric layers202411,894,276Multiple gate field-effect transistors having various gate oxide thicknesses and methods of forming the same202411,855,208Method for forming fin field effect transistor (FinFET) device structure202311,855,176FinFET structure with doped region202311,769,817Method for forming source/drain contacts202311,764,284Semiconductor device with reduced trap defect and method of forming the same202311,735,484Post gate dielectric processing for semiconductor device fabrication202311,664,279Multiple threshold voltage implementation through lanthanum incorporation202311,605,563Semiconductor device with non-conformal gate dielectric layers202311,605,720Metal gate cap202311,437,493Gate spacer structures and methods for forming the same202211,437,280Semiconductor device and method of manufacture202211,404,322Method of manufacturing a semiconductor device202211,398,384Methods for manufacturing a transistor gate by non-directional implantation of impurities in a gate spacer202211,355,635Semiconductor structure and methods of forming same202211,342,188Methods for doping high-k metal gates for tuning threshold voltages202211,329,139Semiconductor device with reduced trap defect and method of forming the same202211,276,766FinFET fabrication methods202211,233,140Semiconductor device and manufacturing method thereof202211,195,931Gate structure, semiconductor device and the method of forming semiconductor device2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (58)· patent assignee history
2021–2026Based in TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD582021–2026
Locations
LocationPatentsSpan
TW582021–2026