Inventor
Soon-Jyh Chang
Inventor
Tainan, TW
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Mprimary
H03MCoding41%
H04LTransmission of digital information, e.g. telegraphic communication19%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses13%
G01KMeasuring temperature6%
H04BTransmission6%
G01RMeasuring electric variables3%
G11CStatic stores3%
H03FAmplifiers3%
H03HImpedance networks, e.g. resonant circuits3%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use3%
PatentTitleYear
10,826,521Successive approximation register analog to digital converter and offset detection method thereof202010,804,917SAR ADC and a reference ripple suppression circuit adaptable thereto202010,476,513SAR ADC with high linearity201910,084,467ADC and an interfacing circuit adaptable thereto20189,857,240'System and method for temperature sensing of three-dimensional integrated circuit'20189,559,705'Clock and data recovery circuit with bidirectional frequency detection and electronic device using the same'20179,448,122'Multi-point temperature sensing method for integrated circuit chip and system of the same'20169,413,377'Switched capacitor circuit and compensation method thereof, and analog to digital converter'20169,331,822'Clock and data recovery circuit and method for estimating jitter tolerance thereof'20169,148,276'Half-rate clock and data recovery circuit'20159,143,171'Duobinary voltage-mode transmitter'20159,088,449'Adaptive switched-capacitor equalizer'20159,083,375'Asynchronous successive approximation register ADC'20158,477,058'Successive approximation analog to digital converter with a direct switching technique for capacitor array through comparator output and method thereof'20138,457,269'Clock and data recovery (CDR) architecture and phase detector thereof'20138,416,116'Successive approximation analog-to-digital converter having auxiliary prediction circuit and method thereof'20138,390,501'Successive approximation register ADC with a window predictive function'20138,310,388'Subrange analog-to-digital converter and method thereof'20128,228,705'Memory cell and an associated memory device'20128,217,819'Multiplying DAC and a method thereof'20127,957,923'Device for jitter measurement and method thereof'20117,924,204'Stage-resolution scalable opamp-sharing technique for pipelined/cyclic ADC'20117,724,063'Integrator-based common-mode stabilization technique for pseudo-differential switched-capacitor circuits'20107,724,174'Successive approximation ADC with binary error tolerance mechanism'2010Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2010–2016Patents assigned to NCKU RES & DEV FOUNDATION (14)· patent assignee history
2010–2020Based in Tainan, TW· patent location history
2011–2020Patents assigned to HIMAX TECH LTD (16)· patent assignee history
2012–2013Patents assigned to CHANG SOON-JYH (7)· patent assignee history
2012–2013Patents assigned to HUANG CHUNG-MING (4)· patent assignee history
2012–2018Patents assigned to UNIV NAT CHENG KUNG (4)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HIMAX TECH LTD | 16 | 2011–2020 |
| NCKU RES & DEV FOUNDATION | 14 | 2010–2016 |
| CHANG SOON-JYHself | 7 | 2012–2013 |
| HUANG CHUNG-MING | 4 | 2012–2013 |
| UNIV NAT CHENG KUNG | 4 | 2012–2018 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tainan, TW | 24 | 2010–2020 |