Inventor
Yasuki Morino
Inventor
Hyogo, JP
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1031%
H10BElectronic memory devices23%
H10DInorganic electric semiconductor devices23%
C23CCoating metallic material8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
PatentTitleYear
8,039,336'Semiconductor device and method of fabrication thereof'20117,846,788'Semiconductor device and method of fabrication thereof'20107,646,055'Semiconductor device and method of fabrication thereof'20106,472,324'Method of manufacturing trench type element isolation structure'20026,206,012'Method of avoiding wall particle contamination in depositing films'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2002Patents assigned to MITSUBISHI ELECTRIC CORP (2)· patent assignee history
2001–2002Based in Tokyo, JP· patent location history
2010–2011Patents assigned to RENESAS ELECTRONICS CORP (2)· patent assignee history
2010Patents assigned to RENESAS TECH CORP (1)· patent assignee history
2010–2011Based in Hyogo, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MITSUBISHI ELECTRIC CORP | 2 | 2001–2002 |
| RENESAS ELECTRONICS CORP | 2 | 2010–2011 |
| RENESAS TECH CORP | 1 | 2010 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hyogo, JP | 3 | 2010–2011 |
| Tokyo, JP | 2 | 2001–2002 |