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Inventor

Suryanarayana R. Maturi

Inventor
San Jose, CA, US

Overview

2→
Patents
2006–2009
Patent span
Physics
Primary field (CPC G)

Patents· 2 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing50%
G11CStatic stores50%
PatentTitleYear
7,490,279'Test interface for random access memory (RAM) built-in self-test (BIST)'20097,096,447'Method and apparatus for efficiently locating and automatically correcting certain violations in a complex existing circuit layout'2006

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2006Patents assigned to SUN MICROSYSTEMS INC (1)· patent assignee history
2006–2009Based in San Jose, CA, US· patent location history
2009Patents assigned to NAT SEMICONDUCTOR CORP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NAT SEMICONDUCTOR CORP12009
SUN MICROSYSTEMS INC12006
Locations
LocationPatentsSpan
San Jose, California, US22006–2009