LexDanaLexDanabeta
Inventor

Abdulla Bataineh

Inventor
Irbid, JO

Overview

7→
Patents
2004–2020
Patent span
Physics
Primary field (CPC G)

Patents· 7 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing57%
H04LTransmission of digital information, e.g. telegraphic communication43%
PatentTitleYear
10,757,022Increasingly minimal bias routing202010,142,235Increasingly minimal bias routing20189,577,918'Increasingly minimal bias routing'20178,601,236'Configurable vector length computer processor'20137,409,505'Optimized high bandwidth cache coherence mechanism'20087,082,500'Optimized high bandwidth cache coherence mechanism'20066,813,599'Efficient memory structure simulation for sequential circuit design verification'2004

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2004–2008Based in Eau Claire, WI, US· patent location history
2006–2020Patents assigned to CRAY INC (6)· patent assignee history
2013Patents assigned to ALVERSON ROBERT (1)· patent assignee history
2013Patents assigned to BATAINEH ABDULLA (1)· patent assignee history
2013Patents assigned to FAANES GREGORY J (1)· patent assignee history
2013Based in Chippewa Falls, WI, US· patent location history
2017–2020Based in Irbid, JO· patent location history
2020Patents assigned to HEWLETT PACKARD ENTPR DEV LP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CRAY INC62006–2020
ALVERSON ROBERT12013
BATAINEH ABDULLAself12013
FAANES GREGORY J12013
HEWLETT PACKARD ENTPR DEV LP12020
Locations
LocationPatentsSpan
Irbid, JO32017–2020
Eau Claire, WI, US32004–2008
Chippewa Falls, WI, US12013