Inventor
Hideo Nakayoshi
Inventor
Yokohama, JP
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1045%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1027%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests18%
B23KSoldering or unsoldering9%
PatentTitleYear
7,071,576'Semiconductor device and method of manufacturing the same'20066,337,258'Method of dividing a wafer'20026,294,439'Method of dividing a wafer and method of manufacturing a semiconductor device'20016,184,109'Method of dividing a wafer and method of manufacturing a semiconductor device'20015,107,325'Structure and method of packaging a semiconductor device'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992Patents assigned to SEIKO EPSON CORP (1)· patent assignee history
1992Based in Suwa, JP· patent location history
2001–2006Patents assigned to TOSHIBA KK (4)· patent assignee history
2001–2006Based in Yokohama, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOSHIBA KK | 4 | 2001–2006 |
| SEIKO EPSON CORP | 1 | 1992 |
Locations
| Location | Patents | Span |
|---|---|---|
| Yokohama, JP | 4 | 2001–2006 |
| Suwa, JP | 1 | 1992 |