Inventor

Rainer Bruchhaus

Inventor
Munich, DE

Overview

35→
Patents
1995–2015
Patent span
Electricity
Primary field (CPC H)

Patents· 35 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices34%
H10BElectronic memory devices23%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
G11CStatic stores7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H10NElectric solid-state devices not otherwise provided for5%
G01JMeasurement of intensity, velocity, spectral content, polarisation, phase or pulse characteristics of infrared, visible or ultraviolet light3%
H01GCapacitors3%
B82YSpecific uses or applications of nanostructures1%
G02BOptical elements, systems or apparatus1%
PatentTitleYear
9,001,558'Method for nondestructively reading resistive memory elements'20158,063,394'Integrated circuit'20117,522,444'Memory circuit, method for operating a memory circuit, memory device and method for producing a memory device'20097,456,456'Semiconductor device and method of manufacturing the same'20087,378,700'Self-aligned V0-contact for cell size reduction'20087,361,549'Method for fabricating memory cells for a memory device'20087,348,619'Ferroelectric memory arrangement'20087,316,980'Method for forming ferrocapacitors and FeRAM devices'20087,198,959'Process for fabrication of a ferrocapacitor'20077,199,002'Process for fabrication of a ferroelectric capacitor'20077,183,121'Process for fabrication of a ferrocapacitor'20077,098,142'Method of etching ferroelectric devices'20067,061,035'Self-aligned V0-contact for cell size reduction'20067,041,551'Device and a method for forming a capacitor device'20066,946,735'Side-wall barrier structure and method of fabrication'20056,940,111'Radiation protection in integrated circuits'20056,867,053'Fabrication of a FeRAM capacitor using a noble metal hardmask'20056,858,492'Method for fabricating a semiconductor memory device'20056,839,220'Multi-layer barrier allowing recovery anneal for ferroelectric capacitors'20056,818,503'Method for fabricating a semiconductor memory device'20046,815,234'Reducing stress in integrated circuits'20046,800,890'Memory architecture with series grouped by cells'20046,773,986'Method for fabricating a semiconductor memory device'20046,746,877'Encapsulation of ferroelectric capacitors'20046,704,219'FeRAM memory and method for manufacturing it'20046,573,542'Capacitor electrodes arrangement with oxygen iridium between silicon and oxygen barrier layer'20036,440,210'Method for producing self-polarized ferro-electric layers, especially PZT layers, with a rhombohedral crystal structure'20026,346,424'Process for producing high-epsilon dielectric layer or ferroelectric layer'20026,316,802'Easy to manufacture integrated semiconductor memory configuration with platinum electrodes'20016,300,652'Memory cell configuration and method for its production'20016,139,971'Stratified structure with a ferroelectric layer and process for producing the same'20006,108,191'Multilayer capacitor with high specific capacitance and production process therefor'20005,939,722'Semiconductor detector for infrared radiation and method for manufacturing same'19995,684,302'Pyrodetector element having a pyroelectric layer produced by oriented growth, and method for the fabrication of the element'19975,403,752'Method for manufacturing a pyrodetector apparatus'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–2002Patents assigned to SIEMENS AG (6)· patent assignee history
1995–2015Based in Munich, DE· patent location history
2001–2009Patents assigned to INFINEON TECHNOLOGIES AG (26)· patent assignee history
2002Based in Mnchen, DE· patent location history
2004–2008Based in Kanagawa, JP· patent location history
2004–2005Based in Kariya, Aichi-pref., JP· patent location history
2011–2015Patents assigned to BRUCHHAUS RAINER (2)· patent assignee history
2011Patents assigned to ANDRES DIETER (1)· patent assignee history
2011Based in Sunnyvale, CA, US· patent location history
2015Patents assigned to FORSCHUNGSZENTRUM JUELICH GMBH (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INFINEON TECHNOLOGIES AG262001–2009
SIEMENS AG61995–2002
BRUCHHAUS RAINERself22011–2015
ANDRES DIETER12011
FORSCHUNGSZENTRUM JUELICH GMBH12015
Locations
LocationPatentsSpan
Munich, DE151995–2015
Kanagawa, JP122004–2008
Kariya, Aichi-pref., JP42004–2005
Mnchen, DE22002
Sunnyvale, California, US12011