Inventor
Yi Wei
Inventor
Chandler, AZ, US
Overview
Patents· 31 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
H10DInorganic electric semiconductor devices20%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests11%
B82YSpecific uses or applications of nanostructures9%
H01JElectric discharge tubes or discharge lamps9%
C30BSingle-crystal growth5%
B01JChemical or physical processes, e.g. catalysis or colloid chemistry3%
C23CCoating metallic material3%
H10BElectronic memory devices3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
7,501,750'Emitting device having electron emitting nanostructures and method of operation'20097,431,964'Method of forming a porous metal catalyst on a substrate for nanotube growth'20087,169,619'Method for fabricating semiconductor structures on vicinal substrates using a low temperature, low pressure, alkaline earth metal-rich process'20077,132,372'Method for preparing a semiconductor substrate surface for semiconductor device fabrication'20067,070,472'Field emission display and methods of forming a field emission display'20066,920,680'Method of making vacuum microelectronic device'20056,916,717'Method for growing a monocrystalline oxide layer and for fabricating a semiconductor device on a monocrystalline substrate'20056,891,319'Field emission display and methods of forming a field emission display'20056,806,202'Method of removing silicon oxide from a surface of a substrate'20046,765,619'Method and apparatus for optimizing exposure time in image acquisitions'20046,730,977'Lower temperature method for forming high quality silicon-nitrogen dielectrics'20046,693,033'Method of removing an amorphous oxide from a monocrystalline surface'20046,613,698'Lower temperature method for forming high quality silicon-nitrogen dielectrics'20036,596,187'Method of forming a nano-supported sponge catalyst on a substrate for nanotube growth'20036,545,258'Photo-sensor cross-section for increased quantum efficiency'20036,420,729'Process to produce ultrathin crystalline silicon nitride on Si (111) for advanced gate dielectrics'20026,353,286'Field emission display having a multi-layered barrier structure'20026,277,681'Process to produce ultrathin crystalline silicon nitride on Si(111) for advanced gate dielectrics'20016,274,510'Lower temperature method for forming high quality silicon-nitrogen dielectrics'20016,258,637'Method for thin film deposition on single-crystal semiconductor substrates'20016,040,230'Method of forming a nano-rugged silicon-containing layer'20006,031,258'High DC current stagger power/ground pad'20006,020,247'Method for thin film deposition on single-crystal semiconductor substrates'20005,830,532'Method to produce ultrathin porous silicon-oxide layer'19985,659,197'Hot-carrier shield formation for bipolar transistor'19975,631,485'ESD and hot carrier resistant integrated circuit structure'19975,504,364'CMOS locos isolation for self-aligned NPN BJT in a BiCMOS process'19965,496,751'Method of forming an ESD and hot carrier resistant integrated circuit structure'19965,391,502'Per-wafer method for globally stressing gate oxide during device fabrication'19955,342,794'Method for forming laterally graded deposit-type emitter for bipolar transistor'19945,208,719'Output pad electrostatic discharge protection circuit for MOS devices'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–1997Patents assigned to VLSI TECHNOLOGY INC (7)· patent assignee history
1993–1997Based in Saratoga, CA, US· patent location history
1995Based in Santa Clara, CA, US· patent location history
1998–2009Based in Chandler, AZ, US· patent location history
2000–2004Patents assigned to TEXAS INSTRUMENTS INC (8)· patent assignee history
2000–2004Based in San Jose, CA, US· patent location history
2001–2003Based in Dallas, TX, US· patent location history
2002–2009Patents assigned to MOTOROLA INC (10)· patent assignee history
2003–2004Patents assigned to PIXIM INC (2)· patent assignee history
2006–2007Patents assigned to FREESCALE SEMICONDUCTOR INC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MOTOROLA INC | 10 | 2002–2009 |
| TEXAS INSTRUMENTS INC | 8 | 2000–2004 |
| VLSI TECHNOLOGY INC | 7 | 1993–1997 |
| FREESCALE SEMICONDUCTOR INC | 2 | 2006–2007 |
| PIXIM INC | 2 | 2003–2004 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chandler, AZ, US | 19 | 1998–2009 |
| Saratoga, California, US | 6 | 1993–1997 |
| San Jose, California, US | 3 | 2000–2004 |
| Dallas, Texas, US | 2 | 2001–2003 |
| Santa Clara, California, US | 1 | 1995 |