Inventor

Oleg Kononchuk

Inventor

Grenoble, FR

Overview

59→

Patents

2000–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 59 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1026%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1018%

H01LSemiconductor devices15%

H10DInorganic electric semiconductor devices9%

C30BSingle-crystal growth8%

G01BMeasuring length, thickness or similar linear dimensions2%

H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation2%

H10NElectric solid-state devices not otherwise provided for2%

Y10TTechnical subjects covered by former us classification2%

H03HImpedance networks, e.g. resonant circuits2%

PatentTitleYear

11,127,624Method of manufacturing a semiconductor on insulator type structure, notably for a front side type imager2021 11,127,775Substrate for front side type imager and method of manufacturing such a substrate2021 10,950,491Method for transferring a useful layer2021 10,943,815Structure for radiofrequency applications2021 10,924,081Substrate for a temperature-compensated surface acoustic wave device or volume acoustic wave device2021 10,910,256Pseudo-substrate with improved efficiency of usage of single crystal material2021 10,886,162Semiconductor-on-insulator substrate for RF applications2021 10,619,997Method for measuring thickness variations in a layer of a multilayer semiconductor structure2020 10,608,610Substrate for a temperature-compensated surface acoustic wave device or volume acoustic wave device2020 10,510,531Method of fabrication of a semiconductor element comprising a highly resistive substrate2019 10,510,565Thermal treatment system with collector device2019 10,347,597Structure for radio-frequency applications2019 10,250,282Structure for radiofrequency applications2019 10,134,602Process for smoothing the surface of a structure2018 9,922,867'Method for transferring a useful layer'2018 9,911,616'Process for treating a structure'2018 9,911,624'Method for dissolving a silicon dioxide layer'2018 9,875,914Process for manufacturing a plurality of structures2018 9,759,546'Method for measuring thickness variations in a layer of a multilayer semiconductor structure'2017 9,679,799'Process for fabricating a semiconductor-on-insulator substrate'2017 9,679,777'Process, stack and assembly for separating a structure from a substrate by electromagnetic radiation'2017 9,589,830'Method for transferring a useful layer'2017 9,548,237'Method for transferring a layer comprising a compressive stress layer and related structures'2017 9,514,960'Method for dissolving a silicon dioxide layer'2016 9,396,987'Method for fabricating a substrate and semiconductor structure'2016 9,198,294'Electronic device for radiofrequency or power applications and process for manufacturing such a device'2015 9,136,113'Process to dissolve the oxide layer in the peripheral ring of a structure of semiconductor-on-insulator type'2015 8,765,571'Method of manufacturing a base substrate for a semi-conductor on insulator type substrate'2014 8,324,072'Process for locally dissolving the oxide layer in a semiconductor-on-insulator type structure'2012 8,309,437'(110) oriented silicon substrate and a bonded pair of substrates comprising said (110) oriented silicon substrate'2012 8,273,636'Process for the transfer of a thin layer formed in a substrate with vacancy clusters'2012 8,263,475'Method for manufacturing heterostructures'2012 8,148,242'Oxidation after oxide dissolution'2012 8,067,298'Relaxation of a strained material layer with application of a stiffener'2011 8,008,929'Method and apparatus for measuring a lifetime of charge carriers'2011 7,947,571'Method for fabricating a semiconductor on insulator substrate with reduced Secco defect density'2011 7,939,387'Patterned thin SOI'2011 7,736,994'Method for manufacturing compound material wafers and corresponding compound material wafer'2010 7,615,466'Method for producing a semiconductor-on-insulator structure'2009 7,531,430'Method for producing a semiconductor-on-insulator structure'2009 7,452,785'Method of fabrication of highly heat dissipative substrates'2008 7,413,964'Method of revealing crystalline defects in a bulk substrate'2008 7,405,136'Methods for manufacturing compound-material wafers and for recycling used donor substrates'2008 6,703,290'Growth of epitaxial semiconductor material with improved crystallographic properties'2004 6,673,147'High resistivity silicon wafer having electrically inactive dopant and method of producing same'2004 6,669,777'Method of producing a high resistivity silicon wafer utilizing heat treatment that occurs during device fabrication'2003 6,669,775'High resistivity silicon wafer produced by a controlled pull rate czochralski method'2003 6,583,024'High resistivity silicon wafer with thick epitaxial layer and method of producing same'2003 6,565,652'High resistivity silicon wafer and method of producing same using the magnetic field Czochralski method'2003 6,562,128'In-situ post epitaxial treatment process'2003 6,506,667'Growth of epitaxial semiconductor material with improved crystallographic properties'2003 6,416,391'Method of demounting silicon wafers after polishing'2002 6,352,071'Apparatus and method for reducing bow and warp in silicon wafers sliced by a wire saw'2002 6,346,460'Low cost silicon substrate with impurity gettering and latch up protection and method of manufacture'2002 6,286,685'System and method for wafer thickness sorting'2001 6,284,986'Method of determining the thickness of a layer on a silicon substrate'2001 6,190,453'Growth of epitaxial semiconductor material with improved crystallographic properties'2001 6,184,154'Method of processing the backside of a wafer within an epitaxial reactor chamber'2001 6,059,875'Method of effecting nitrogen doping in Czochralski grown silicon crystal'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2004Patents assigned to SEH AMERICA INC (15)· patent assignee history

2000–2004Based in Brush Prairie, WA, US· patent location history

2001–2003Based in Vancouver, WA, US· patent location history

2008–2021Patents assigned to SOITEC SILICON ON INSULATOR (43)· patent assignee history

2008–2021Based in Grenoble, FR· patent location history

2011–2015Patents assigned to KONONCHUK OLEG (8)· patent assignee history

2011–2021Based in Theys, FR· patent location history

2012–2015Patents assigned to FIGUET CHRISTOPHE (2)· patent assignee history

2017–2021Patents assigned to COMMISSARIAT ENERGIE ATOMIQUE (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
SOITEC SILICON ON INSULATOR	43	2008–2021
SEH AMERICA INC	15	2000–2004
KONONCHUK OLEGself	8	2011–2015
COMMISSARIAT ENERGIE ATOMIQUE	2	2017–2021
FIGUET CHRISTOPHE	2	2012–2015

Locations

Location	Patents	Span
Grenoble, FR	27	2008–2021
Theys, FR	16	2011–2021
Brush Prairie, Washington, US	12	2000–2004
Vancouver, Washington, US	4	2001–2003