Inventor
Walter Niklaus
Inventor
Stuttgart, DE
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing67%
G01RMeasuring electric variables33%
PatentTitleYear
8,499,144'Updating settings of a processor core concurrently to the operation of a multi core processor system'20138,090,929'Generating clock signals for coupled ASIC chips in processor interface with X and Y logic operable in functional and scanning modes'20127,966,536'Method and apparatus for automatic scan completion in the event of a system checkstop'20117,568,138'Method to prevent firmware defects from disturbing logic clocks to improve system reliability'2009Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2009–2013Patents assigned to IBM (4)· patent assignee history
2009–2013Based in Stuttgart, DE· patent location history
2011–2012Based in Jettingen, DE· patent location history
2012–2013Patents assigned to NIKLAUS WALTER (2)· patent assignee history
2012–2013Patents assigned to WEBEL TOBIAS (2)· patent assignee history
2013Patents assigned to CONKLIN CHRISTOPHER R (1)· patent assignee history
2013Patents assigned to FEE MICHAEL F (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 4 | 2009–2013 |
| NIKLAUS WALTERself | 2 | 2012–2013 |
| WEBEL TOBIAS | 2 | 2012–2013 |
| CONKLIN CHRISTOPHER R | 1 | 2013 |
| FEE MICHAEL F | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Stuttgart, DE | 2 | 2009–2013 |
| Jettingen, DE | 2 | 2011–2012 |