Inventor

Tsai-Sheng Gau

Inventor

Hsinchu, TW

Overview

2000–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 116 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G03Fprimary

G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices22%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%

H01LSemiconductor devices17%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%

H10DInorganic electric semiconductor devices8%

G06FElectric digital data processing7%

G03BApparatus or arrangements for taking photographs or for projecting or viewing them2%

G06TImage data processing or generation, in general2%

G01NInvestigating or analysing materials by determining their chemical or physical properties1%

B82YSpecific uses or applications of nanostructures1%

PatentTitleYear

11,087,994Via connection to a partially filled trench2021 10,930,505Methods for integrated circuit design and fabrication2021 10,818,509Method of fabricating semiconductor device with reduced trench distortions2020 10,796,055Method for coloring circuit layout and system for performing the same2020 10,770,303Mechanisms for forming patterns using multiple lithography processes2020 10,665,467Spacer etching process for integrated circuit design2020 10,535,646Systems and methods for a sequential spacer scheme2020 10,515,823Via connection to a partially filled trench2019 10,509,881Method for coloring circuit layout and system for performing the same2019 10,410,913Multi-layer metal contacts2019 10,410,863Methods for integrated circuit design and fabrication2019 10,324,369Methods for generating a mandrel mask2019 10,312,109Lithographic technique incorporating varied pattern materials2019 10,276,363Mechanisms for forming patterns using multiple lithography processes2019 10,163,885Systems and methods for a sequential spacer scheme2018 10,163,654Method of fabricating semiconductor device with reduced trench distortions2018 10,153,166Mechanisms for forming patterns using lithography processes2018 10,146,141Lithography process and system with enhanced overlay quality2018 10,049,918Directional patterning methods2018 10,032,664Methods for patterning a target layer through fosse trenches using reverse sacrificial spacer lithography2018 10,014,175Lithography using high selectivity spacers for pitch reduction2018 9,991,132Lithographic technique incorporating varied pattern materials2018 9,983,473Photomask and method for fabricating integrated circuit2018 9,911,623'Via connection to a partially filled trench'2018 9,911,606'Mandrel spacer patterning in multi-pitch integrated circuit manufacturing'2018 9,852,908Methods for integrated circuit design and fabrication2017 9,773,676'Lithography using high selectivity spacers for pitch reduction'2017 9,761,436'Mechanisms for forming patterns using multiple lithography processes'2017 9,747,408'Generating final mask pattern by performing inverse beam technology process'2017 9,735,140'Systems and methods for a sequential spacer scheme'2017 9,684,236'Method of patterning a film layer'2017 9,612,526'Photomask and method for fabricating integrated circuit'2017 9,530,660'Multiple directed self-assembly patterning process'2016 9,502,261'Spacer etching process for integrated circuit design'2016 9,449,880'Fin patterning methods for increased process margin'2016 9,418,868'Method of fabricating semiconductor device with reduced trench distortions'2016 9,418,199'Method and apparatus for extracting systematic defects'2016 9,412,649'Method of fabricating semiconductor device'2016 9,362,169'Self-aligned semiconductor fabrication with fosse features'2016 9,362,119'Methods for integrated circuit design and fabrication'2016 9,362,132'Systems and methods for a sequential spacer scheme'2016 9,356,021'Self-alignment for two or more layers and methods of forming same'2016 9,337,083'Multi-layer metal contacts'2016 9,305,841'Method of patterning a feature of a semiconductor device'2016 RE045943'Measurement of overlay offset in semiconductor processing'2016 9,245,763'Mechanisms for forming patterns using multiple lithography processes'2016 9,214,356'Mechanisms for forming patterns'2015 9,201,022'Extraction of systematic defects'2015 9,177,797'Lithography using high selectivity spacers for pitch reduction'2015 9,153,478'Spacer etching process for integrated circuit design'2015 9,070,630'Mechanisms for forming patterns'2015 9,054,159'Method of patterning a feature of a semiconductor device'2015 9,026,957'Method of defining an intensity selective exposure photomask'2015 9,003,336'Mask assignment optimization'2015 8,987,008'Integrated circuit layout and method with double patterning'2015 8,984,450'Method and apparatus for extracting systematic defects'2015 8,962,464'Self-alignment for using two or more layers and methods of forming same'2015 8,959,460'Layout decomposition method'2015 8,943,445'Method of merging color sets of layout'2015 8,837,810'System and method for alignment in semiconductor device fabrication'2014 8,835,323'Method for integrated circuit patterning'2014 8,765,329'Sub-resolution rod in the transition region'2014 8,762,899'Method for metal correlated via split for double patterning'2014 8,673,520'Intensity selective exposure photomask'2014 8,658,344'Patterning process and photoresist with a photodegradable base'2014 8,656,319'Optical proximity correction convergence control'2014 8,631,379'Decomposing integrated circuit layout'2014 8,617,410'Method and system for wafer inspection'2013 8,563,198'Device and method for providing wavelength reduction with a photomask'2013 8,431,291'Intensity selective exposure photomask'2013 8,381,153'Dissection splitting with optical proximity correction and mask rule check enforcement'2013 8,381,139'Method for metal correlated via split for double patterning'2013 8,264,662'In-line particle detection for immersion lithography'2012 8,216,767'Patterning process and chemical amplified photoresist with a photodegradable base'2012 8,179,536'Measurement of overlay offset in semiconductor processing'2012 8,125,611'Apparatus and method for immersion lithography'2012 8,038,897'Method and system for wafer inspection'2011 8,027,529'System for improving critical dimension uniformity'2011 7,934,177'Method and system for a pattern layout split'2011 7,924,401'Seal ring arrangements for immersion lithography systems'2011 7,897,297'Method and system for optimizing intra-field critical dimension uniformity using a sacrificial twin mask'2011 7,858,404'Measurement of overlay offset in semiconductor processing'2010 7,851,774'System and method for direct writing to a wafer'2010 7,838,386'Method and system for patterning alignment marks on a transparent substrate'2010 7,800,731'Method and apparatus for removing particles in immersion lithography'2010 7,796,249'Mask haze early detection'2010 7,787,685'Extracting ordinary and extraordinary optical characteristics for critical dimension measurement of anisotropic materials'2010 7,777,884'Method and system for optimizing sub-nanometer critical dimension using pitch offset'2010 7,751,025'Scatterometric method of monitoring hot plate temperature and facilitating critical dimension control'2010 7,732,109'Method and system for improving critical dimension uniformity'2010 7,675,604'Hood for immersion lithography'2010 7,666,576'Exposure scan and step direction optimization'2010 7,667,821'Multi-focus scanning with a tilted mask or wafer'2010 7,659,964'Level adjustment systems and adjustable pin chuck thereof'2010 7,643,976'Method and system for identifying lens aberration sensitive patterns in an integrated circuit chip'2010 7,580,129'Method and system for improving accuracy of critical dimension metrology'2009 7,517,639'Seal ring arrangements for immersion lithography systems'2009 7,501,226'Immersion lithography system with wafer sealing mechanisms'2009 7,479,466'Method of heating semiconductor wafer to improve wafer flatness'2009 7,450,296'Method and system for patterning alignment marks on a transparent substrate'2008 7,399,709'Complementary replacement of material'2008 7,393,616'Line end spacing measurement'2008 7,307,001'Wafer repair method using direct-writing'2007 7,279,267'Method for manipulating the topography of a film surface'2007 7,266,803'Layout generation and optimization to improve photolithographic performance'2007 7,234,128'Method for improving the critical dimension uniformity of patterned features on wafers'2007 7,180,572'Immersion optical projection system'2007 7,135,259'Scatterometric method of monitoring hot plate temperature and facilitating critical dimension control'2006 7,091,502'Apparatus and method for immersion lithography'2006 6,973,636'Method of defining forbidden pitches for a lithography exposure tool'2005 6,877,152'Method of inter-field critical dimension control'2005 6,768,538'Photolithography system to increase overlay accuracy'2004 6,744,058'Geometric compensation method for charged particle beam irradiation'2004 6,361,909'Illumination aperture filter design using superposition'2002 6,291,118'Elimination of proximity effect in photoresist'2001 6,040,119'Elimination of proximity effect in photoresist'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2021Based in Hsinchu, TW· patent location history

2004–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (75)· patent assignee history

2004Based in Taipei, TW· patent location history

2005Based in Sanchung, TW· patent location history

2010–2015Based in Hsin Chu, TW· patent location history

2012–2015Patents assigned to GAU TSAI-SHENG (17)· patent assignee history

2013–2014Patents assigned to LIU RU-GUN (8)· patent assignee history

2013–2014Patents assigned to HUANG WEN-CHUN (7)· patent assignee history

2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (38)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG	75	2004–2016
TAIWAN SEMICONDUCTOR MFG CO LTD	38	2016–2021
GAU TSAI-SHENGself	17	2012–2015
LIU RU-GUN	8	2013–2014
HUANG WEN-CHUN	7	2013–2014

Locations

Location	Patents	Span
Hsinchu, TW	110	2000–2021
Hsin Chu, TW	4	2010–2015
Sanchung, TW	1	2005
Taipei, TW	1	2004