Inventor
Yoshihiro Takao
Inventor
Kawasaki, JP
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices30%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1020%
H10BElectronic memory devices13%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests11%
C07CAcyclic or carbocyclic compounds7%
G11CStatic stores4%
B01JChemical or physical processes, e.g. catalysis or colloid chemistry2%
C07DHeterocyclic compounds2%
PatentTitleYear
8,642,805'Method of producing phthaloyl dichloride compound, catalyst for use in the method, and method of forming the catalyst'20148,569,126'Semiconductor device and manufacturing method thereof'20138,178,932'Semiconductor device having transistors'20127,913,195'Method for creating mask layout data, apparatus for creating mask layout data, and method for manufacturing semiconductor device'20117,906,400'Method of manufacturing a semiconductor device having transistors and semiconductor device having transistors'20117,728,418'Semiconductor device and manufacturing method thereof'20107,592,241'Semiconductor device having well with peak impurity concentrations and method for fabricating the same'20097,470,973'Semiconductor device and semiconductor integrated circuit device'20087,414,278'Semiconductor device with shallow trench isolation which controls mechanical stresses'20087,109,128'Semiconductor device and method of manufacturing the same'20067,084,506'Semiconductor device'20067,061,112'Semiconductor device including an electrical contact connected to an interconnection'20067,030,498'Semiconductor device with copper wirings having improved negative bias temperature instability (NBTI)'20066,885,105'Semiconductor device with copper wirings'20056,800,909'Semiconductor device and method of manufacturing the same'20046,727,557'Semiconductor device having well tap provided in memory cell'20046,414,186'Process for producing chloromethylphenylacetic acid'20026,251,721'Semiconductor device and method of manufacturing the same'20015,886,211'Process for producing 2-(halomethyl)phenylacetic acid esters'19995,452,247'Three-dimensional static random access memory device for avoiding disconnection among transistors of each memory cell'19955,266,511'Process for manufacturing three dimensional IC\'s'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–2008Patents assigned to FUJITSU LTD (12)· patent assignee history
1993–2011Based in Kawasaki, JP· patent location history
1995Based in Kanagawa, JP· patent location history
1999–2014Based in Shizuoka, JP· patent location history
2009–2010Patents assigned to FUJITSU MICROELECTRONICS LTD (2)· patent assignee history
2011–2013Patents assigned to FUJITSU SEMICONDUCTOR LTD (4)· patent assignee history
2012–2014Patents assigned to TAKAO YOSHIHIRO (3)· patent assignee history
2012–2013Based in Yokohama, JP· patent location history
2014Patents assigned to HANAWA TAKESHI (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FUJITSU LTD | 12 | 1993–2008 |
| FUJITSU SEMICONDUCTOR LTD | 4 | 2011–2013 |
| TAKAO YOSHIHIROself | 3 | 2012–2014 |
| FUJITSU MICROELECTRONICS LTD | 2 | 2009–2010 |
| HANAWA TAKESHI | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kawasaki, JP | 15 | 1993–2011 |
| Shizuoka, JP | 3 | 1999–2014 |
| Yokohama, JP | 2 | 2012–2013 |
| Kanagawa, JP | 1 | 1995 |