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Inventor

Benjamin S. Ting

Inventor
Saratoga, CA, US

Overview

56→
Patents
1994–2015
Patent span
Electricity
Primary field (CPC H)

Patents· 56 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Kprimary
H03KPulse technique58%
Y10TTechnical subjects covered by former us classification17%
H04LTransmission of digital information, e.g. telegraphic communication13%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
G06FElectric digital data processing3%
G11CStatic stores1%
H01LSemiconductor devices1%
H04QSelecting1%
PatentTitleYear
8,981,814'Permutable switching network with enhanced interconnectivity for multicasting signals'20158,698,519'Scalable non-blocking switching network for programmable logic'20148,456,192'Permutable switching network with enhanced interconnectivity for multicasting signals'20138,395,415'Enhanced permutable switching network with multicasting signals for interconnection fabric'20138,341,580'Modular routing fabric using switching networks'20128,289,047'Architecture and interconnect scheme for programmable logic circuits'20128,242,807'Scalable non-blocking switching network for programmable logic'20128,106,682'Permutable switching network with enhanced interconnectivity for multicasting signals'20127,999,570'Enhanced permutable switching network with multicasting signals for interconnection fabric'20117,986,163'Scalable non-blocking switching network for programmable logic'20117,915,918'Method and apparatus for universal program controlled bus architecture'20117,876,126'Permutable switching network with enhanced interconnectivity for multicasting signals'20117,863,932'Scalable non-blocking switching network for programmable logic'20117,830,173'Method and apparatus for universal program controlled bus architecture'20107,777,519'Permutable switching network with enhanced multicasting signals routing for interconnection fabric'20107,768,302'Scalable non-blocking switching network for programmable logic'20107,714,611'Permutable switching network with enhanced multicasting signals routing for interconnection fabric'20107,705,629'Permutable switching network with enhanced interconnectivity for multicasting signals'20107,646,218'Architecture and interconnect scheme for programmable logic circuits'20107,557,613'Scalable non-blocking switching network for programmable logic'20097,460,529'Interconnection fabric using switching networks in hierarchy'20087,423,453'Efficient integrated circuit layout scheme to implement a scalable switching network used in interconnection fabric'20087,417,457'Scalable non-blocking switching network for programmable logic'20087,409,664'Architecture and interconnect scheme for programmable logic circuits'20087,382,156'Method and apparatus for universal program controlled bus architecture'20087,368,943'Enhanced scheme to implement an interconnection fabric using switching networks in hierarchy'20087,256,614'Scalable non-blocking switching network for programmable logic'20077,142,012'Architecture and interconnect scheme for programmable logic circuits'20067,126,375'Floor plan for scalable multiple level tab oriented interconnect architecture'20067,078,933'Architecture and interconnect scheme for programmable logic circuits'20067,017,136'Architecture and interconnect scheme for programmable logic circuits'20067,009,422'Floor plan for scalable multiple level tab oriented interconnect architecture'20066,989,688'Architecture and interconnect scheme for programmable logic circuits'20066,975,138'Method and apparatus for universal program controlled bus architecture'20056,975,139'Scalable non-blocking switching network for programmable logic'20056,781,410'Method and apparatus for universal program controlled bus architecture'20046,747,482'Architecture and interconnect scheme for programmable logic circuits'20046,703,861'Architecture and interconnect scheme for programmable logic circuits'20046,624,658'Method and apparatus for universal program controlled bus architecture'20036,597,196'Architecture and interconnect scheme for programmable logic circuits'20036,507,217'Architecture and interconnect scheme for programmable logic circuits'20036,504,399'Method and apparatus for universal program controlled bus architecture'20036,462,578'Architecture and interconnect scheme for programmable logic circuits'20026,433,580'Architecture and interconnect scheme for programmable logic circuits'20026,417,690'Floor plan for scalable multiple level tab oriented interconnect architecture'20026,329,839'Method and apparatus for universal program controlled bus architecture'20016,320,412'Architecture and interconnect for programmable logic circuits'20016,300,793'Scalable multiple level tab oriented interconnect architecture'20016,088,526'Scalable multiple level tab oriented interconnect architecture'20006,051,991'Architecture and interconnect scheme for programmable logic circuits'20006,034,547'Method and apparatus for universal program controlled bus'20005,850,564'Scalable multiple level tab oriented interconnect architecture'19985,640,327'Apparatus and method for partitioning resources for interconnections'19975,640,344'Programmable non-volatile bidirectional switch for programmable logic'19975,457,410'Architecture and interconnect scheme for programmable logic circuits'19955,298,805'Versatile and efficient cell-to-local bus interface in a configurable logic array'1994

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1994–2015Based in Saratoga, CA, US· patent location history
1995–2006Patents assigned to BTR INC (20)· patent assignee history
2000–2015Patents assigned to ADVANTAGE LOGIC INC (28)· patent assignee history
2008–2012Patents assigned to ACTEL CORP (6)· patent assignee history
2012–2014Patents assigned to TING BENJAMIN S (7)· patent assignee history
2012–2014Patents assigned to PANI PETER M (6)· patent assignee history
2014Based in Mountain View, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
ADVANTAGE LOGIC INC282000–2015
BTR INC201995–2006
TING BENJAMIN Sself72012–2014
ACTEL CORP62008–2012
PANI PETER M62012–2014
Locations
LocationPatentsSpan
Saratoga, California, US551994–2015
Mountain View, California, US12014