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Inventor

Masaki Okuda

Inventor
Kawasaki, JP

Overview

19→
Patents
2000–2021
Patent span
Physics
Primary field (CPC G)

Patents· 19 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores35%
G06FElectric digital data processing16%
H03KPulse technique6%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses6%
B23KSoldering or unsoldering3%
C23CCoating metallic material3%
G01CMeasuring distances, levels or bearings3%
G01RMeasuring electric variables3%
G06TImage data processing or generation, in general3%
G09BEducational or demonstration appliances3%
PatentTitleYear
11,112,955Nautical chart display device, nautical chart display method, and nautical chart display program20219,401,192'Ferroelectric memory device and timing circuit to control the boost level of a word line'20168,609,246'Electroconductive fine particles, anisotropic electroconductive material, and electroconductive connection structure'20137,675,773'Semiconductor memory, test method of semiconductor memory and system'20107,649,796'Semiconductor memory and operating method of same'20107,650,536'Forced termination condition monitoring device, forced termination condition monitoring method and storage medium embodying forced termination condition monitoring program'20107,642,844'Semiconductor integrated circuit for voltage detection'20107,557,645'Semiconductor device'20097,427,885'Semiconductor device having a power supply capacitor'20087,330,062'Input/output logical circuit'20087,190,204'Logical circuit'20076,922,750'Semiconductor memory device capable of simultaneously reading data and refreshing data'20056,754,126'Semiconductor memory'20046,728,157'Semiconductor memory'20046,667,913'Semiconductor memory device'20036,535,452'Semiconductor memory device having error correction function for data reading during refresh operation'20036,337,833'Memory device'20026,199,025'Semiconductor device having selectable device type and methods of testing device operation'20016,104,659'Memory device'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2010Patents assigned to FUJITSU LTD (12)· patent assignee history
2000–2010Based in Kawasaki, JP· patent location history
2009–2010Patents assigned to FUJITSU MICROELECTRONICS LTD (4)· patent assignee history
2013Patents assigned to MATSUSHITA KIYOTO (1)· patent assignee history
2013Based in Shiga, JP· patent location history
2016Patents assigned to FUJITSU SEMICONDUCTOR LTD (1)· patent assignee history
2016Based in Shinjuku-ku, JP· patent location history
2021Patents assigned to FURUNO ELECTRIC CO (1)· patent assignee history
2021Based in Kyoto, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
FUJITSU LTD122000–2010
FUJITSU MICROELECTRONICS LTD42009–2010
FUJITSU SEMICONDUCTOR LTD12016
FURUNO ELECTRIC CO12021
MATSUSHITA KIYOTO12013
Locations
LocationPatentsSpan
Kawasaki, JP162000–2010
Kyoto, JP12021
Shinjuku-ku, JP12016
Shiga, JP12013