Inventor
Gyh-Bin Wang
Inventor
Chung-Li, TW
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores46%
G09GArrangements or circuits for control of indicating devices using static means to present variable information12%
G06FElectric digital data processing8%
H04NPictorial communication, e.g. television8%
G01RMeasuring electric variables4%
G06TImage data processing or generation, in general4%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%
H03KPulse technique4%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses4%
H04LTransmission of digital information, e.g. telegraphic communication4%
PatentTitleYear
11,030,721Efficient parallel optical flow algorithm and GPU implementation202110,559,374Circuit topology of memory chips with embedded function test pattern generation module connected to normal access port physical layer20209,997,224Memory architecture with multi-bank memory cell array accessed by local drive circuit within memory bank20189,679,622'Method for controlling memory device asynchronously with respect to system clock, and related memory device and memory system'20179,653,148'Multi-bank memory device and system'20179,466,355'Memory architecture dividing memory cell array into independent memory banks'20168,754,656'High speed test circuit and method'20147,961,966'Digitized image stabilization using energy analysis method'20117,860,202'Method and circuit for transferring data stream across multiple clock domains'20106,943,783'LCD controller which supports a no-scaling image without a frame buffer'20056,791,382'Noise reduction method and system for a multiple clock, mixed signal integrated circuit'20046,543,015'Efficient data compression circuit for memory testing'20036,453,381'DDR DRAM data coherence scheme'20026,429,710'Input buffer with compensation for process variation'20026,229,726'Integrated circuit chip having multiple package options'20016,198,340'High efficiency CMOS pump circuit'20016,130,853'Address decoding scheme for DDR memory'20006,064,613'Pre-sense amplifier with reduced output swing'20005,999,032'Multiple phase synchronous race delay clock distribution circuit with skew compensation'19995,923,613'Latched type clock synchronizer with additional 180.degree.-phase shift clock'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2011Patents assigned to ETRON TECHNOLOGY INC (13)· patent assignee history
1999–2004Based in Chung-Li, TW· patent location history
2000–2014Based in Hsinchu, TW· patent location history
2005–2011Based in Jungli, TW· patent location history
2014Patents assigned to PIECEMAKERS TECHNOLOGY INC (1)· patent assignee history
2014Patents assigned to TIEN LI-CHIN (1)· patent assignee history
2016–2020Patents assigned to PIECEMAKERS TECH INC (5)· patent assignee history
2016–2020Based in Hsinchu County, TW· patent location history
2021Patents assigned to SNAP INC (1)· patent assignee history
2021Based in Los Angeles, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ETRON TECHNOLOGY INC | 13 | 1999–2011 |
| PIECEMAKERS TECH INC | 5 | 2016–2020 |
| PIECEMAKERS TECHNOLOGY INC | 1 | 2014 |
| SNAP INC | 1 | 2021 |
| TIEN LI-CHIN | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chung-Li, TW | 9 | 1999–2004 |
| Hsinchu County, TW | 5 | 2016–2020 |
| Hsinchu, TW | 3 | 2000–2014 |
| Jungli, TW | 2 | 2005–2011 |
| Los Angeles, California, US | 1 | 2021 |