Inventor
Hirohiko Mochizuki
Inventor
Kawasaki, JP
Overview
Patents· 31 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores54%
H03KPulse technique16%
G06FElectric digital data processing9%
H10DInorganic electric semiconductor devices9%
G05FSystems for regulating electric or magnetic variables4%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses4%
F02BInternal-combustion piston engines2%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems2%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%
PatentTitleYear
6,166,992'Semiconductor device'20006,154,405'Semiconductor memory device having a dummy cell resetting the bit lines to a reset potential that is based on data read in a previous read data'20006,151,274'System configured of synchronous semiconductor device for adjusting timing of each input and semiconductor device used therefor'20006,028,816'System configured of synchronous semiconductor device for adjusting timing of each input and semiconductor device used therefor'20006,009,039'Semiconductor device'19995,986,293'Semiconductor integrated circuit device with voltage patterns'19995,978,884'Semiconductor memory device having a single line data bus and latch circuits for improved pipeline operations'19995,889,725'Decoder circuit for a semiconductor memory device'19995,874,853'Semiconductor integrated circuit system'19995,835,790'Apparatus for data transfer capable of pipeline processing by cascading processing circuits without relying on external clock with an output circuit relying on external clock'19985,767,712'Semiconductor device'19985,757,226'Reference voltage generating circuit having step-down circuit outputting a voltage equal to a reference voltage'19985,668,763'Semiconductor memory for increasing the number of half good memories by selecting and using good memory blocks'19975,663,917'Semiconductor circuit having MOS circuit for use in strong electric field'19975,537,354'Semiconductor memory device and method of forming the same'19965,535,169'Semiconductor memory device'19965,483,497'Semiconductor memory having a plurality of banks usable in a plurality of bank configurations'19965,329,492'Semiconductor memory device having improved connections between word lines and memory cell array blocks'19945,319,607'Semiconductor unit'19944,989,182'Dynamic random access memory having dummy word line for facilitating reset of row address latch'19914,870,617'Semiconductor memory device having data bus reset circuits'19894,821,232'Semiconductor memory device having data bus reset circuit'19894,807,192'Memory device employing address multiplexing'19894,799,197'Semiconductor memory device having a CMOS sense amplifier'19894,672,372'Semiconductor device having matched-timing dynamic circuit and static circuit'19874,653,027'Semiconductor memory device'19874,601,017'Semiconductor memory device having active pull-up circuits'19864,558,434'Semiconductor memory device'19854,413,272'Semiconductor devices having fuses'19834,392,211'Semiconductor memory device technical field'19834,382,194'Boosting circuit'1983Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1983–2000Patents assigned to FUJITSU LTD (31)· patent assignee history
1983Based in Tokyo, JP· patent location history
1985–2000Based in Kawasaki, JP· patent location history
1989–1994Patents assigned to FUJITSU VLSI LTD (5)· patent assignee history
1999Based in Kanagawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FUJITSU LTD | 31 | 1983–2000 |
| FUJITSU VLSI LTD | 5 | 1989–1994 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kawasaki, JP | 27 | 1985–2000 |
| Tokyo, JP | 3 | 1983 |
| Kanagawa, JP | 1 | 1999 |