Inventor
Ippei Kume
Inventor
Yokkaichi, JP
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1029%
H01LSemiconductor devices24%
H10DInorganic electric semiconductor devices19%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
H10BElectronic memory devices8%
C25DProcesses for the electrolytic or electrophoretic production of coatings1%
PatentTitleYear
11,043,419Semiconductor device and manufacturing method thereof202110,971,400Semiconductor device, substrate for semiconductor device and method of manufacturing the semiconductor device202110,943,852Semiconductor device and method for manufacturing the same202110,892,232Semiconductor device202110,804,152Method of manufacturing semiconductor device202010,741,505Method of manufacturing semiconductor device and semiconductor device202010,566,311Semiconductor device202010,468,334Semiconductor device and manufacturing method thereof201910,297,531Method for producing semiconductor device and semiconductor device201910,269,748Semiconductor device and manufacturing method of semiconductor device201910,211,165Method of manufacturing semiconductor device and semiconductor device201910,204,862Method of manufacturing semiconductor device, and semiconductor device201910,153,227Method for producing semiconductor device and semiconductor device201810,026,715Semiconductor device and manufacturing method thereof20189,589,951'High-electron-mobility transistor with protective diode'20179,373,679'Semiconductor device comprising capacitive element'20169,337,093'Method of manufacturing semiconductor device'20169,231,105'Semiconductor device with group-III nitride compound semiconductor layer on substrate for transistor'20169,196,731'Semiconductor device'20158,946,800'Semiconductor device with protective layer and method of manufacturing same'20158,810,000'Semiconductor device comprising capacitive element'20148,803,285'Semiconductor device capable of reducing interelectrode leak current and manufacturing method thereof'20148,759,212'Semiconductor device and method of manufacturing semiconductor device'20148,648,441'Semiconductor device and method of manufacturing semiconductor device'20148,629,529'Semiconductor device and its manufacturing method'20148,624,328'Semiconductor device'20148,390,046'Semiconductor device'2013Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2013–2017Patents assigned to RENESAS ELECTRONICS CORP (12)· patent assignee history
2013–2016Patents assigned to KUME IPPEI (9)· patent assignee history
2013–2014Patents assigned to HAYASHI YOSHIHIRO (7)· patent assignee history
2013–2016Based in Kanagawa, JP· patent location history
2014–2016Patents assigned to INOUE NAOYA (6)· patent assignee history
2014–2017Based in Tokyo, JP· patent location history
2018–2021Patents assigned to TOSHIBA MEMORY CORP (14)· patent assignee history
2018–2019Based in Oita-shi, JP· patent location history
2018–2021Based in Mie, JP· patent location history
2019–2021Based in Yokkaichi, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOSHIBA MEMORY CORP | 14 | 2018–2021 |
| RENESAS ELECTRONICS CORP | 12 | 2013–2017 |
| KUME IPPEIself | 9 | 2013–2016 |
| HAYASHI YOSHIHIRO | 7 | 2013–2014 |
| INOUE NAOYA | 6 | 2014–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Yokkaichi, JP | 9 | 2019–2021 |
| Kanagawa, JP | 6 | 2013–2016 |
| Tokyo, JP | 5 | 2014–2017 |
| Oita-shi, JP | 3 | 2018–2019 |
| Mie, JP | 2 | 2018–2021 |