Inventor
JIN-MU YIN
Inventor
TW
Overview
Patents· 7 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices39%
H01LSemiconductor devices33%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1022%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
PatentTitleYear
12,543,361Gate-all-around transistor having inner space lined by a semiconductor liner and method of forming the same202612,389,612Method of forming a stress reduction structure for metal-insulator-metal capacitors202512,021,133Inner spacer liner202411,532,695Stress reduction structure for metal-insulator-metal capacitors202211,444,173Semiconductor device structure with salicide layer and method for forming the same202211,444,178Inner spacer liner202211,222,946Semiconductor device including a high density MIM capacitor and method2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (7)· patent assignee history
2022–2026Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 7 | 2022–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 7 | 2022–2026 |