Inventor
Bong-seok Chae
Inventor
Kyungki-do, KR
Overview
Patents· 3 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1040%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests40%
G11CStatic stores20%
PatentTitleYear
7,630,223'Memory device and method of arranging signal and power lines'20096,525,417'Integrated circuits having reduced step height by using dummy conductive lines'20036,372,626'Method of reducing step heights in integrated circuits by using dummy conductive lines, and integrated circuits fabricated thereby'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2009Patents assigned to SAMSUNG ELECTRONICS CO LTD (3)· patent assignee history
2002–2003Based in Kyungki-do, KR· patent location history
2009Based in Gyeonggi-do, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 3 | 2002–2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kyungki-do, KR | 2 | 2002–2003 |
| Gyeonggi-do, KR | 1 | 2009 |