Inventor
David C. Tannenbaum
Inventor
Austin, TX, US
Overview
Patents· 37 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Tprimary
G06TImage data processing or generation, in general42%
G06FElectric digital data processing38%
G09GArrangements or circuits for control of indicating devices using static means to present variable information7%
G01RMeasuring electric variables4%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%
G05BControl or regulating systems in general2%
H04NPictorial communication, e.g. television2%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications2%
PatentTitleYear
11,010,954Efficient redundant coverage discard mechanism to reduce pixel shader work in a tile-based graphics rendering pipeline202110,691,455Power saving branch modes in hardware202010,635,439Efficient interface and transport mechanism for binding bindless shader programs to run-time specified graphics pipeline configurations and objects202010,503,513Dispatching a stored instruction in response to determining that a received instruction is of a same instruction type201910,496,578Central arbitration scheme for a highly efficient interconnection topology in a GPU201910,386,410Highly flexible performance counter and system debug module201910,360,034System and method for maintaining data in a low-power structure201910,310,012Lightweight, low overhead debug bus201910,282,889Vertex attribute compression and decompression in hardware20199,829,956Approach to power reduction in floating-point operations20179,665,969'Data path and instruction set for packed pixel operations for video processing'20179,600,235'Technique for performing arbitrary width integer arithmetic operations using fixed width elements'20179,465,575'FFMA operations using a multi-step approach to data shifting'20169,465,578'Logic circuitry configurable to perform 32-bit or dual 16-bit floating-point operations'20169,383,968'Math processing by detection of elementary valued operands'20169,268,528'System and method for dynamically reducing power consumption of floating-point logic'20168,106,914'Fused multiply-add functional unit'20127,733,349'Device, method, and system for generating per-pixel light values using texture parameters'20107,400,325'Culling before setup in viewport and culling unit'20087,400,326'System and method for delivering multiple data streams via multiple buses'20087,339,590'Vertex processing unit supporting vertex texture mapping'20087,292,239'Cull before attribute read'20076,891,538'Dual mode device and method for generating vector cross products or dot products'20056,844,880'System, method and computer program product for an improved programmable vertex processing model with instruction set'20056,809,732'Method and apparatus for generation of programmable shader configuration information from state-based control information and program instructions'20046,317,126'Method and device for associating a pixel with one of a plurality of regions in a logarithm or cosine space'20015,720,020'Hardware based graphics workstation solution for refraction phenomena'19985,659,671'Method and apparatus for shading graphical images in a data processing system'19975,526,471'Rendering of non-opaque media using the p-buffer to account for polarization parameters'19965,434,967'Decision variable hardware logic and processing methods for graphics display system'19955,430,841'Context management in a graphics system'19955,371,514'Method and apparatus for determining the drawing primitives that are visible in a pick aperture of a graphics system'19945,367,632'Flexible memory controller for graphics applications'19945,325,485'Method and apparatus for displaying primitives processed by a parallel processor system in a sequential order'19945,289,576'Attribute filter for computer graphics applications'19945,255,359'Picking function for a pipeline graphics system using hierarchical graphics structures'19935,182,797'Multi-processor graphics display system for displaying hierarchical data structures'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–1998Patents assigned to IBM (11)· patent assignee history
1993Based in Kingston, NY, US· patent location history
1994–1998Based in Hurley, NY, US· patent location history
2001–2010Based in San Jose, CA, US· patent location history
2004–2019Patents assigned to NVIDIA CORP (15)· patent assignee history
2004–2021Based in Austin, TX, US· patent location history
2005–2010Patents assigned to MICROSOFT CORP (2)· patent assignee history
2017Patents assigned to GADRE SHIRISH (1)· patent assignee history
2019–2021Patents assigned to SAMSUNG ELECTRONICS CO LTD (8)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NVIDIA CORP | 15 | 2004–2019 |
| IBM | 11 | 1993–1998 |
| SAMSUNG ELECTRONICS CO LTD | 8 | 2019–2021 |
| MICROSOFT CORP | 2 | 2005–2010 |
| GADRE SHIRISH | 1 | 2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 23 | 2004–2021 |
| Hurley, New York, US | 9 | 1994–1998 |
| San Jose, California, US | 3 | 2001–2010 |
| Kingston, New York, US | 2 | 1993 |