Inventor
Chih-Sheng Chang
Inventor
Hsinchu, TW
Overview
Patents· 120 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices28%
H01LSemiconductor devices24%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1016%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
G06FElectric digital data processing4%
H10BElectronic memory devices4%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices2%
B82YSpecific uses or applications of nanostructures1%
G01RMeasuring electric variables1%
H03KPulse technique1%
PatentTitleYear
11,127,675Interconnection structure and manufacturing method thereof202111,114,540Semiconductor device including standard cells with header/footer switch including negative capacitance202111,056,401Semiconductor device and method for manufacturing the same202110,872,955Semiconductor device and fabricating method thereof202010,868,132Semiconductor device including standard cells with header/footer switch including negative capacitance202010,861,937Integrated circuit structure and method with solid phase diffusion202010,841,547Method for fabricating small right angle prism mirrors involving 3D shape on optical glue layer202010,825,899Semiconductor device and fabricating method thereof202010,818,562Semiconductor structure and testing method thereof202010,784,153Metal interconnect structure and method for fabricating the same202010,784,362Semiconductor device and manufacturing method thereof202010,741,678Semiconductor device and manufacturing method thereof202010,734,472Negative capacitance FET with improved reliability performance202010,732,658Correction control module for power factor correction circuit202010,732,209Semiconductor test device and manufacturing method thereof202010,700,075Structure and method for SRAM FinFET device having an oxide feature202010,692,867Method and structure for FinFET device202010,670,641Semiconductor test device and manufacturing method thereof202010,636,829Wafer-level optical structure202010,600,732Semiconductor device and method for fabricating the same202010,516,061Semiconductor device and manufacturing method thereof201910,504,796Semiconductor device and method for manufacturing the same201910,505,040Method of manufacturing a semiconductor device having a gate with ferroelectric layer201910,490,631Semiconductor device and fabricating method thereof201910,468,528FinFET device with high-k metal gate stack201910,438,843Semiconductor device and method for fabricating the same201910,438,893Metal interconnect structure and method for fabricating the same201910,373,829Patterning method201910,354,792Transformer structure201910,340,366Semiconductor device and manufacturing method thereof201910,325,816Structure and method for FinFET device201910,283,414Isolation manufacturing method for semiconductor structures201910,284,189Redundant isolating switch control circuit201910,276,697Negative capacitance FET with improved reliability performance201910,204,826Method for removing damaged layer embedded in a dielectric layer201910,170,374Semiconductor device and method for manufacturing the same201910,164,016Integrated circuit structure and method with solid phase diffusion201810,163,905Method and structure for FinFET device201810,141,310Short channel effect suppression201810,056,498Semiconductor device and manufacturing method thereof201810,049,938Semiconductor devices, FinFET devices, and manufacturing methods thereof201810,025,136Touch polarizer and touch display device20189,953,975Methods for forming STI regions in integrated circuits20189,911,850'FinFETs and the methods for forming the same'20189,906,073'Power supply for reducing working power loss'20189,773,860'Capacitor and method for fabricating the same'20179,768,301'Short channel effect suppression'20179,761,586'Method and structure for FinFET device'20179,741,829'Semiconductor device and manufacturing method thereof'20179,721,955'Structure and method for SRAM FinFET device having an oxide feature'20179,716,146'Integrated circuit structure and method with solid phase diffusion'20179,698,060'Germanium FinFETs with metal gates and stressors'20179,698,058'Structure and method for FinFET device'20179,659,826'Asymmetric source/drain depths'20179,645,428'Display panel with protective adhesive portion and manufacturing method thereof'20179,646,958'Integrated circuits including dummy structures and methods of forming the same'20179,646,994'Semiconductor devices and manufacturing methods thereof'20179,634,001'System and methods for converting planar design to FinFET design'20179,601,598'Method of manufacturing a fin-like field effect transistor (FinFET) device'20179,553,025'Selective Fin-shaping process'20179,525,049'Method for fabricating fin field effect transistors'20169,515,071'Asymmetric source/drain depths'20169,472,550'Adjusted fin width in integrated circuitry'20169,472,672'Eliminating fin mismatch using isolation last'20169,437,683'Method and structure for FinFET device'20169,406,697'Semiconductor devices and manufacturing methods thereof'20169,391,078'Method and structure for finFET devices'20169,379,217'FinFETs and the methods for forming the same'20169,368,594'Method of forming a fin-like BJT'20169,355,848'Semiconductor structure and method for forming the same'20169,269,641'Monitor test key of epi profile'20169,257,343'Method for fabricating fin field effect transistors'20169,245,805'Germanium FinFETs with metal gates and stressors'20169,236,253'Strained structure of a semiconductor device'20169,209,303'Structure and method for FinFET device'20159,209,185'Method and structure for FinFET device'20159,178,067'Structure and method for FinFET device'20159,070,774'Process for fabricating silicon-on-nothing MOSFETs'20159,035,426'Fin-like BJT'20159,029,958'FinFETs and the methods for forming the same'20159,026,959'Method and device for increasing fin device density for unaligned fins'20158,963,257'Fin field effect transistors and methods for fabricating the same'20158,946,829'Selective fin-shaping process using plasma doping and etching for 3-dimensional transistor applications'20158,906,710'Monitor test key of epi profile'20148,896,055'Accumulation type FinFET, circuits and fabrication method thereof'20148,881,066'Mandrel modification for achieving single fin fin-like field effect transistor (FinFET) device'20148,881,084'FinFET boundary optimization'20148,875,076'System and methods for converting planar design to FinFET design'20148,816,444'System and methods for converting planar design to FinFET design'20148,806,397'Method and device for increasing fin device density for unaligned fins'20148,799,833'System and methods for converting planar design to FinFET design'20148,796,759'Fin-like field effect transistor (FinFET) device and method of manufacturing same'20148,769,446'Method and device for increasing fin device density for unaligned fins'20148,759,184'FinFETs and the methods for forming the same'20148,726,220'System and methods for converting planar design to FinFET design'20148,633,076'Method for adjusting fin width in integrated circuitry'20148,621,398'Automatic layout conversion for FinFET device'20138,621,406'System and methods for converting planar design to FinFET design'20138,609,499'FinFETs and the methods for forming the same'20138,525,267'Device and method for forming Fins in integrated circuitry'20138,486,769'Method for forming metrology structures from fins in integrated circuitry'20138,324,713'Profile design for lateral-vertical bipolar junction transistor'20128,305,319'Liquid crystal display device having look up table for adjusting common voltages and driving method thereof'20128,264,032'Accumulation type FinFET, circuits and fabrication method thereof'20128,106,468'Process for fabricating silicon-on-nothing MOSFETs'20128,073,825'Data correction apparatus, data correction method and tangible machine-readable medium thereof'20117,990,354'Liquid crystal display having gradation voltage adjusting circuit and driving method thereof'20117,746,130'Triangular wave generating circuit having synchronization with external clock'20107,718,494'Method for forming high-drain-voltage tolerance MOSFET transistor in a CMOS process flow with double well dose approach'20107,701,038'High-gain vertex lateral bipolar junction transistor'20107,532,210'Driving method for active matrix liquid crystal display panel'20097,468,305'Forming pocket and LDD regions using separate masks'20087,462,560'Process of physical vapor depositing mirror layer with improved reflectivity'20087,268,409'Spiral inductor with electrically controllable resistivity of silicon substrate layer'20077,129,547'Method of fabricating a high performance MOSFET device featuring formation of an elevated source/drain region'20067,115,438'Method for manufacturing a complementary metal-oxide semiconductor sensor'20066,902,980'Method of fabricating a high performance MOSFET device featuring formation of an elevated source/drain region'20056,784,115'Method of simultaneously implementing differential gate oxide thickness using fluorine bearing impurities'20046,483,841'System and method for reducing capacity demand of ethernet switch controller'20026,376,300'Process of manufacturing trench capacitor having a hill structure'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2021Based in Hsinchu, TW· patent location history
2005–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (43)· patent assignee history
2006–2021Patents assigned to UNITED MICROELECTRONICS CORP (11)· patent assignee history
2006–2020Based in Taipei, TW· patent location history
2009–2012Based in Miaoli, TW· patent location history
2010–2021Based in Tainan, TW· patent location history
2012–2017Patents assigned to CHANG CHIH-SHENG (26)· patent assignee history
2013–2015Patents assigned to LIN YI-TANG (14)· patent assignee history
2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (50)· patent assignee history
2017Based in New Taipei, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 50 | 2016–2021 |
| TAIWAN SEMICONDUCTOR MFG | 43 | 2005–2016 |
| CHANG CHIH-SHENGself | 26 | 2012–2017 |
| LIN YI-TANG | 14 | 2013–2015 |
| UNITED MICROELECTRONICS CORP | 11 | 2006–2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 96 | 2002–2021 |
| Tainan, TW | 10 | 2010–2021 |
| Taipei, TW | 7 | 2006–2020 |
| Miaoli, TW | 3 | 2009–2012 |
| New Taipei, TW | 1 | 2017 |