Inventor
Kevin Roy Vannorsdel
Inventor
San Jose, CA, US
Overview
Patents· 16 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Bprimary
G11BInformation storage based on relative movement between record carrier and transducer35%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems15%
H03FAmplifiers15%
H03KPulse technique12%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications12%
B82YSpecific uses or applications of nanostructures4%
G01FMeasuring volume, volume flow, mass flow or liquid level4%
G05FSystems for regulating electric or magnetic variables4%
PatentTitleYear
11,018,581Methods and devices for operating converters202110,775,819Multi-loop voltage regulator with load tracking compensation20209,473,023'Switched mode assisted linear regulator with seamless transition between power tracking configurations'20169,112,413'Switched mode assisted linear regulator with AC coupling with capacitive charge control'20159,112,409'Switched mode assisted linear regulator with dynamic buck turn-off using ZCD-controlled tub switching'20156,954,321'Method and apparatus for improved read-to-write transition time for a magneto-resistive head'20056,850,378'Method and apparatus for providing quadrature biasing for coupled-pair circuits'20056,847,501'Method and apparatus for providing matched differential MR biasing and pre-amplification'20056,847,500'Methods and apparatus for gradually decreasing supply current demand in arm electronics for write-to-read transitions'20056,525,896'Method and circuitry for high voltage application with MOSFET technology'20036,424,173'Voltage translators with zero static power and predictable performance'20026,324,029'Method and system for GMR sensor reset pulse application'20016,236,233'Method and system for translating TTL off-chip drive for integrated circuit with negative substrate bias'20016,130,795'Method and apparatus to sense and report connection integrity of a differential ECL transmission line having proper parallel termination'20005,966,263'Method and apparatus to increase head/AE select robustness for a system using multiple head servo write'19995,619,539'Data detection methods and apparatus for a direct access storage device'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2005Patents assigned to IBM (8)· patent assignee history
1997–2005Based in San Jose, CA, US· patent location history
2005Patents assigned to HITACHI GLOBAL STORAGE TECH (3)· patent assignee history
2015–2016Patents assigned to TEXAS INSTRUMENTS INC (3)· patent assignee history
2015–2021Based in Erie, CO, US· patent location history
2020–2021Patents assigned to AVAGO TECH INT SALES PTE LID (2)· patent assignee history
2021Patents assigned to AVAGE TECH INTERNATIONAL SALES PTE LIMITED (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 8 | 1997–2005 |
| HITACHI GLOBAL STORAGE TECH | 3 | 2005 |
| TEXAS INSTRUMENTS INC | 3 | 2015–2016 |
| AVAGO TECH INT SALES PTE LID | 2 | 2020–2021 |
| AVAGE TECH INTERNATIONAL SALES PTE LIMITED | 1 | 2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 11 | 1997–2005 |
| Erie, CO, US | 5 | 2015–2021 |