Inventor

MAO-LIN HUANG

Inventor
TW

Overview

74→
Patents
2021–2026
Patent span
Electricity
Primary field (CPC H)

Patents· 74 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices30%
H01LSemiconductor devices28%
B82YSpecific uses or applications of nanostructures20%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1016%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
H10BElectronic memory devices1%
H04LTransmission of digital information, e.g. telegraphic communication0%
H04QSelecting0%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests0%
PatentTitleYear
12,557,371Semiconductor structure and method for manufacturing the same202612,513,953Tuning threshold voltage in nanosheet transitor devices202512,507,474Input/output semiconductor devices202512,477,766Semiconductor transistor device structure including nanostructure and gate structure with protection layer and fill layer and method for forming the same202512,451,359Fluorine incorporation method for nanosheet202512,419,073Device having a gate electrode wrapping around semiconductor layers and proximate to a dielectric fin202512,396,248Semiconductor device fabrication methods and structures thereof202512,389,675Semiconductor device having nanosheet transistor and methods of fabrication thereof202512,324,219Integrated circuit including dipole incorporation for threshold voltage tuning in transistors202512,315,731Integrated circuit with nanosheet transistors with metal gate passivation202512,288,695Method of forming a transistor device having dipole-containing gate dielectric layer and fluorine-containing gate dielectric layer202512,266,654FinFET devices and methods of forming the same202512,237,372Field effect transistor and method202512,237,396P-metal gate first gate replacement process for multigate devices202512,237,373Field effect transistor and method202512,206,005Semiconductor structures and methods thereof202512,199,190Silicon channel tempering202512,191,209Semiconductor device202512,176,391Semiconductor device structure having an isolation layer to isolate a conductive feature and a gate electrode layer202412,170,231Gate-all-around device with trimmed channel and dipoled dielectric layer and methods of forming the same202412,166,100Nanosheet device with dipole dielectric layer and methods of forming the same202412,148,750Work function design to increase density of nanosheet devices202412,119,391Fin-based semiconductor device structure including self-aligned contacts and method for forming the same202412,119,266Semiconductor arrangement and method of manufacture202412,107,131Gate-all-around devices having self-aligned capping between channel and backside power rail202412,087,772Nanosheet device architecture for cell-height scaling202412,087,771Multiple patterning gate scheme for nanosheet rule scaling202412,068,393Etching back and selective deposition of metal gate202412,062,693Semiconductor device structure and methods of forming the same202412,040,191Semiconductor structures and methods thereof202412,034,006Input/output semiconductor devices202412,021,132Gate patterning process for multi-gate devices202411,996,334Semiconductor device fabrication methods and structures thereof202411,961,840Semiconductor device having nanosheet transistor and methods of fabrication thereof202411,948,987Self-aligned backside source contact structure202411,942,377Gate structure and patterning method202411,915,937Fluorine incorporation method for nanosheet202411,901,361Semiconductor structure and method for forming the same202411,894,460Semiconductor device having nanosheet transistor and methods of fabrication thereof202411,894,367Integrated circuit including dipole incorporation for threshold voltage tuning in transistors202411,869,955Integrated circuit with nanosheet transistors with robust gate oxide202411,862,700Semiconductor device structure including forksheet transistors and methods of forming the same202411,862,633Work function design to increase density of nanosheet devices202411,848,368Transistors with different threshold voltages202311,830,924Nanosheet device with dipole dielectric layer and methods of forming the same202311,791,218Dipole patterning for CMOS devices202311,756,995Method of forming a semiconductor device structure having an isolation layer to isolate a conductive feature and a gate electrode layer202311,728,401Semiconductor structures and methods thereof202311,710,667Gate-all-around device with trimmed channel and dipoled dielectric layer and methods of forming the same202311,676,866Semiconductor arrangement and method of manufacture202311,670,723Silicon channel tempering202311,670,692Gate-all-around devices having self-aligned capping between channel and backside power rail202311,658,837Multicast packet replication method202311,637,195Metal gate patterning process including dielectric Fin formation202311,626,327Methods of fabricating semiconductor devices with mixed threshold voltages boundary isolation of multiple gates and structures formed thereby202311,626,485Field effect transistor and method202311,615,962Semiconductor structures and methods thereof202311,600,533Semiconductor device fabrication methods and structures thereof202311,594,614P-metal gate first gate replacement process for multigate devices202311,563,109Semiconductor device structure and method for forming the same202311,502,168Tuning threshold voltage in nanosheet transitor devices202211,450,664Semiconductor device having nanosheet transistor and methods of fabrication thereof202211,417,653Semiconductor structure and method for forming the same202211,387,346Gate patterning process for multi-gate devices202211,380,774Etching back and selective deposition of metal gate202211,374,105Nanosheet device with dipole dielectric layer and methods of forming the same202211,264,288Gate structure and patterning method202211,257,815Work function design to increase density of nanosheet devices202211,244,871Methods of fabricating semiconductor devices for tightening spacing between nanosheets in GAA structures and structures formed thereby202211,245,033Semiconductor devices with core-shell structures202211,205,650Input/output semiconductor devices202111,201,094Forming metal gates with multiple threshold voltages202111,152,477Transistors with different threshold voltages202111,145,734Semiconductor device with dummy fin and liner and method of forming the same2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (73)· patent assignee history
2021–2026Based in TW· patent location history
2023Patents assigned to REALTEK SEMICONDUCTOR CORP (1)· patent assignee history
2025Patents assigned to TAIWAN SEMICONDICTOR MFG COMPANY LTD (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD732021–2026
REALTEK SEMICONDUCTOR CORP12023
TAIWAN SEMICONDICTOR MFG COMPANY LTD12025
Locations
LocationPatentsSpan
TW742021–2026