Inventor
Timothy C. Krywanczyk
Inventor
Essex Junction, VT, US
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1047%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
C09GPolishing compositions5%
C09KMaterials for miscellaneous applications, not provided for elsewhere5%
C23FNon-mechanical removal of metallic material from surface5%
G01RMeasuring electric variables5%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems3%
H10BElectronic memory devices3%
H10DInorganic electric semiconductor devices3%
B24BMachines, devices, or processes for grinding or polishing2%
PatentTitleYear
10,192,748Controlling of etch depth in deep via etching processes and resultant structures20198,806,740'Silicon chicklet pedestal'20148,595,919'Silicon chicklet pedestal'20138,163,602'Ultraviolet energy curable tape and method of making a semiconductor chip using the tape'20128,034,718'Method to recover patterned semiconductor wafers for rework'20117,987,591'Method of forming silicon chicklet pedestal'20117,932,614'Method of thinning a semiconductor substrate'20117,902,682'Ultraviolet energy curable tape and method of making a semiconductor chip using the tape'20117,867,876'Method of thinning a semiconductor substrate'20117,855,130'Corrosion inhibitor additives to prevent semiconductor device bond-pad corrosion during wafer dicing operations'20107,844,099'Inspection method for protecting image sensor devices with front surface protection'20107,771,560'Methods to prevent ECC (edge chipping and cracking) damage during die picking process'20107,732,303'Method for recycling of ion implantation monitor wafers'20107,722,446'System and device for thinning wafers that have contact bumps'20107,700,488'Recycling of ion implantation monitor wafers'20107,666,689'Method to remove circuit patterns from a wafer'20107,572,739'Tape removal in semiconductor structure fabrication'20097,498,236'Silicon wafer thinning end point method'20097,387,911'Application of a thermally conductive thin film to a wafer backside prior to dicing to prevent chipping and cracking'20087,348,216'Rework process for removing residual UV adhesive from C4 wafer surfaces'20087,288,465'Semiconductor wafer front side protection'20077,135,124'Method for thinning wafers that have contact bumps'20067,074,715'Use of photoresist in substrate vias during backside grind'20067,025,891'Method of polishing C4 molybdenum masks to remove molybdenum peaks'20067,001,827'Semiconductor wafer front side protection'20066,888,223'Use of photoresist in substrate vias during backside grind'20056,599,173'Method to prevent leaving residual metal in CMP process of metal interconnect'20036,455,434'Prevention of slurry build-up within wafer topography during polishing'20026,355,565'Chemical-mechanical-polishing slurry and method for polishing metal/oxide layers'20026,340,601'Method for reworking copper metallurgy in semiconductor devices'20026,328,794'Method of controlling stress in a film'20016,294,105'Chemical mechanical polishing slurry and method for polishing metal/oxide layers'20016,284,151'Chemical mechanical polishing slurry for tungsten'20015,913,125'Method of controlling stress in a film'19995,842,910'Off-center grooved polish pad for CMP'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2014Patents assigned to IBM (34)· patent assignee history
1998–2019Based in Essex Junction, VT, US· patent location history
2006Based in Essex, VT, US· patent location history
2012–2014Patents assigned to KRYWANCZYK TIMOTHY C (3)· patent assignee history
2013–2014Patents assigned to CHEY S JAY (2)· patent assignee history
2013–2014Patents assigned to SHAIKH MOHAMMED S (2)· patent assignee history
2013–2014Patents assigned to TIERSCH MATTHEW T (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 34 | 1998–2014 |
| KRYWANCZYK TIMOTHY Cself | 3 | 2012–2014 |
| CHEY S JAY | 2 | 2013–2014 |
| SHAIKH MOHAMMED S | 2 | 2013–2014 |
| TIERSCH MATTHEW T | 2 | 2013–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Essex Junction, VT, US | 34 | 1998–2019 |
| Essex, VT, US | 1 | 2006 |