Inventor
Carol L. Thompson
Inventor
San Jose, CA, US
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
8,141,068'Compiler with flexible scheduling'20127,334,112'Method and apparatus for managing access to out-of-frame registers'20087,272,702'Method and apparatus for managing access to out-of-frame registers'20077,065,754'Method and apparatus for switching between multiple implementations of a routine'20067,013,460'Specifying an invariant property (range of addresses) in the annotation in source code of the computer program'20066,986,131'Method and apparatus for efficient code generation for modulo scheduled uncounted loops'20066,951,015'Prefetch insertion by correlation of cache misses and previously executed instructions'20056,898,787'Method and apparatus for ordered predicate phi in static single assignment form'20056,883,166'Method and apparatus for performing correctness checks opportunistically'20056,880,153'Method and apparatus for varying the level of correctness checks executed when performing correctness checks opportunistically using spare instruction slots'20056,874,138'Method and apparatus for resuming execution of a failed computer program'20056,845,501'Method and apparatus for enabling a compiler to reduce cache misses by performing pre-fetches in the event of context switch'20056,708,288'Compiler-based checkpointing for support of error recovery'20046,701,518'System and method for enabling efficient processing of a program that includes assertion instructions'20046,665,793'Method and apparatus for managing access to out-of-frame Registers'20036,658,656'Method and apparatus for creating alternative versions of code segments and dynamically substituting execution of the alternative code versions'20036,654,877'System and method for selectively executing computer code'20036,643,769'System and method for enabling selective execution of computer code'20036,314,513'Method and apparatus for transferring data between a register stack and a memory resource'20016,275,981'Method and system for correlating profile data dynamically generated from an optimized executable program with source code statements'20016,263,401'Method and apparatus for transferring data between a register stack and a memory resource'20016,065,114'Cover instruction and asynchronous backing store switch'20005,915,117'Computer architecture for the deferral of exceptions on speculative instructions'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2003Patents assigned to INST THE DEV OF EMERGING ARCHI (3)· patent assignee history
1999–2012Based in San Jose, CA, US· patent location history
2000Patents assigned to IDEA CORP (1)· patent assignee history
2001Patents assigned to HEWLETT PACKARD CO (1)· patent assignee history
2001Patents assigned to INTEL CORP (1)· patent assignee history
2003–2012Patents assigned to HEWLETT PACKARD DEVELOPMENT CO (17)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HEWLETT PACKARD DEVELOPMENT CO | 17 | 2003–2012 |
| INST THE DEV OF EMERGING ARCHI | 3 | 1999–2003 |
| HEWLETT PACKARD CO | 1 | 2001 |
| IDEA CORP | 1 | 2000 |
| INTEL CORP | 1 | 2001 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 23 | 1999–2012 |