Inventor
Erhard Joachim Pistorius
Inventor
Mountain View, CA, US
Overview
Patents· 7 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique40%
G06FElectric digital data processing30%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1030%
PatentTitleYear
9,292,474'Configurable hybrid adder circuitry'20168,863,065'Stacked die network-on-chip for FPGA'20148,719,753'Stacked die network-on-chip for FPGA'20148,521,801'Configurable hybrid adder circuitry'20138,161,469'Method and apparatus for comparing programmable logic device configurations'20127,804,325'Dedicated function block interfacing with general purpose function blocks on integrated circuits'20107,701,252'Stacked die network-on-chip for FPGA'2010Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2010–2016Patents assigned to ALTERA CORP (7)· patent assignee history
2010–2016Based in Mountain View, CA, US· patent location history
2012–2014Patents assigned to PISTORIUS ERHARD JOACHIM (4)· patent assignee history
2012Based in Milpitas, CA, US· patent location history
2013Patents assigned to HUTTON MICHAEL D (1)· patent assignee history
2014Patents assigned to CHOW FRANCIS MAN-CHIT (2)· patent assignee history
2014Patents assigned to PATEL RAKESH H (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ALTERA CORP | 7 | 2010–2016 |
| PISTORIUS ERHARD JOACHIMself | 4 | 2012–2014 |
| CHOW FRANCIS MAN-CHIT | 2 | 2014 |
| PATEL RAKESH H | 2 | 2014 |
| HUTTON MICHAEL D | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Mountain View, California, US | 6 | 2010–2016 |
| Milpitas, California, US | 1 | 2012 |