Inventor

Edward J. Nowak

Inventor

Essex Junction, VT, US

Overview

1992–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 503 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices44%

H01LSemiconductor devices13%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1012%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%

H10BElectronic memory devices5%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%

H03KPulse technique2%

H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation1%

B82YSpecific uses or applications of nanostructures1%

G06FElectric digital data processing1%

PatentTitleYear

RE048616Isolation region fabrication for replacement gate processing2021 11,024,546Vertical field effect transistors2021 10,957,799Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions2021 10,943,831Vertical field effect transistors2021 10,909,443Neuromorphic circuit structure and method to form same2021 10,903,361Fabrication of a vertical field effect transistor device with a modified vertical fin geometry2021 10,903,369Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions2021 10,896,857Vertical field effect transistors2021 10,879,112Self-aligned via forming to conductive line and related wiring structure2020 10,727,253Simplified memory cells based on fully-depleted silicon-on-insulator transistors2020 10,714,616FINFET having a gate structure in a trench feature in a bent fin2020 10,714,396Variable gate lengths for vertical transistors2020 10,699,961Isolation techniques for high-voltage device structures2020 10,658,390Virtual drain for decreased harmonic generation in fully depleted SOI (FDSOI) RF switches2020 10,636,876Devices with channel extension regions2020 10,629,703Sloped finFET with methods of forming same2020 10,622,477Fabrication of a vertical field effect transistor device with a modified vertical fin geometry2020 10,573,562Integrating a planar field effect transistor (FET) with a vertical FET2020 10,529,627Vertical field effect transistors2020 10,424,516Integrating a planar field effect transistor (FET) with a vertical FET2019 10,418,484Vertical field effect transistors incorporating U-shaped semiconductor bodies and methods2019 10,395,992Variable gate lengths for vertical transistors2019 10,381,459Transistors with H-shaped or U-shaped channels and method for forming the same2019 10,373,942Logic layout with reduced area and method of making the same2019 10,347,759Vertical FET structure2019 10,332,801Vertical field effect transistors2019 10,332,803Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of forming2019 10,312,347Sloped finFET with methods of forming same2019 10,304,955Fabrication of a vertical field effect transistor device with a modified vertical fin geometry2019 10,290,549Integrated circuit structure, gate all-around integrated circuit structure and methods of forming same2019 10,269,707Semiconductor structures with field effect transistor(s) having low-resistance source/drain contact(s)2019 10,256,156Vertical field effect transistors2019 10,256,235Vertical transistors and methods of forming same2019 10,224,249Merged gate for vertical transistors2019 10,163,716Symmetric tunnel field effect transistor2018 10,164,027Symmetric tunnel field effect transistor2018 10,134,893Fabrication of a vertical field effect transistor device with a modified vertical fin geometry2018 10,043,715Vertical field effect transistors2018 10,026,653Variable gate lengths for vertical transistors2018 10,020,224Self-aligned via forming to conductive line and related wiring structure2018 10,002,962Vertical FET structure2018 9,991,170Integrating a planar field effect transistor (FET) with a vertical FET2018 9,985,112Sloped finFET with methods of forming same2018 9,972,550Source/drain epitaxial electrical monitor2018 9,954,529Ultra dense vertical transport FET circuits2018 9,941,179Capacitive measurements of divots in semiconductor devices2018 9,935,106Multi-finger devices in mutliple-gate-contacted-pitch, integrated structures2018 9,929,152'Vertical transistors and methods of forming same'2018 9,911,598'Symmetric tunnel field effect transistor'2018 9,887,193'Integrating a planar field effect transistor (FET) with a vertical FET'2018 9,887,192'Interconnects for vertical-transport field-effect transistors'2018 9,876,084Symmetric tunnel field effect transistor2018 9,847,416Performance-enhanced vertical device and method of forming thereof2017 9,825,172'Field effect transistor structure and method of forming same'2017 9,805,990'FDSOI voltage reference'2017 9,786,751'Semiconductor structures with field effect transistor(s) having low-resistance source/drain contact(s)'2017 9,786,765'FINFET having notched fins and method of forming same'2017 9,786,788'Vertical-transport FinFET device with variable Fin pitch'2017 9,786,507'Methods of forming field effect transistors using a gate cut process following final gate formation'2017 9,768,304'Method of fabricating a FINFET having a gate structure disposed at least partially at a bend region of the semiconductor fin'2017 9,755,071'Merged gate for vertical transistors'2017 9,748,271'Hybrid circuit including a tunnel field-effect transistor'2017 RE046448'Isolation region fabrication for replacement gate processing'2017 9,680,473'Ultra dense vertical transport FET circuits'2017 9,673,055'Method for quadruple frequency FinFETs with single-fin removal'2017 9,659,941'Integrated circuit structure with methods of electrically connecting same'2017 9,653,360'Vertical field effect transistors'2017 9,613,955'Hybrid circuit including a tunnel field-effect transistor'2017 9,613,861'Damascene wires with top via structures'2017 9,613,867'Symmetric tunnel field effect transistor'2017 9,570,357'Vertical field effect transistors'2017 RE046303'Isolation region fabrication for replacement gate processing'2017 9,552,852'Doped metal-insulator-transition latch circuitry'2017 9,536,882'Field-isolated bulk FinFET'2017 9,520,391'Field effect transistor having delay element with back gate'2016 9,502,407'Integrating a planar field effect transistor (FET) with a vertical FET'2016 9,496,394'Semiconductor structures with field effect transistor(s) having low-resistance source/drain contact(s)'2016 9,478,615'Blanket short channel roll-up implant with non-angled long channel compensating implant through patterned opening'2016 9,443,857'Vertical fin eDRAM'2016 9,437,595'Barrier trench structure and methods of manufacture'2016 9,436,789'Structure, method and system for complementary strain fill for integrated circuit chips'2016 9,379,253'Symmetric tunnel field effect transistor'2016 9,373,678'Non-planar capacitors with finely tuned capacitance values and methods of forming the non-planar capacitors'2016 9,373,641'Methods of forming field effect transistors using a gate cut process following final gate formation'2016 9,368,410'Semiconductor devices having tensile and/or compressive stress and methods of manufacturing'2016 9,349,852'Method, structure and design structure for customizing history effects of SOI circuits'2016 9,337,334'Semiconductor memory device employing a ferromagnetic gate'2016 9,299,835'Vertical field effect transistors'2016 9,286,425'Method, structure and design structure for customizing history effects of SOI circuits'2016 9,272,233'Nano-filter and method of forming same, and method of filtration'2016 9,263,442'Replacement gate structures and methods of manufacturing'2016 9,257,427'Merged tapered finFET'2016 9,245,981'Dielectric filler fins for planar topography in gate level'2016 9,240,352'Bulk finFET well contacts with fin pattern uniformity'2016 9,231,085'Semiconductor structure and methods of manufacture'2016 9,224,841'Semiconductor fins on a trench isolation region in a bulk semiconductor substrate and a method of forming the semiconductor fins'2015 9,224,837'Semiconductor structures with pair(s) of vertical field effect transistors, each pair having a shared source/drain region and methods of forming the structures'2015 9,153,669'Low capacitance finFET gate structure'2015 9,105,498'Gate strain induced work function engineering'2015 9,105,707'ZRAM heterochannel memory'2015 9,087,897'Semiconductor structures with pair(s) of vertical field effect transistors, each pair having a shared source/drain region and methods of forming the structures'2015 9,070,579'Gate strain induced work function engineering'2015 9,064,974'Barrier trench structure and methods of manufacture'2015 9,064,943'Gate-all-around field effect transistor structures and methods'2015 9,059,319'Embedded dynamic random access memory device and method'2015 9,059,017'Source/drain-to-source/drain recessed strap and methods of manufacture of same'2015 9,059,080'Methods of fabricating trench generated device structures'2015 9,048,217'Middle of-line borderless contact structure and method of forming'2015 9,041,107'Devices with gate-to-gate isolation structures and methods of manufacture'2015 9,040,383'Devices with gate-to-gate isolation structures and methods of manufacture'2015 9,023,694'Body contacted hybrid surface semiconductor-on-insulator devices'2015 8,987,789'Transistors having stressed channel regions and methods of forming transistors having stressed channel regions'2015 8,963,254'Simultaneous formation of FinFET and MUGFET'2015 8,963,211'Method, structure and design structure for customizing history effects of SOI circuits'2015 8,962,398'Body contacted hybrid surface semiconductor-on-insulator devices'2015 8,963,294'Dense chevron finFET and method of manufacturing same'2015 8,957,479'Formation of multi-height MUGFET'2015 8,946,801'Field effect transistors (FETs) and methods of manufacture'2015 8,946,027'Replacement-gate FinFET structure and process'2015 8,946,049'Replacement gate structures and methods of manufacturing'2015 8,941,180'Integrated circuit structure incorporating one or more asymmetric field effect transistors as power gates for an electronic circuit with stacked symmetric field effect transistors'2015 8,941,190'Semiconductor structures and methods of manufacture'2015 8,932,884'Process environment variation evaluation'2015 8,933,490'Structure, method and system for complementary strain fill for integrated circuit chips'2015 8,927,399'Localized implant into active region for enhanced stress'2015 8,916,932'Semiconductor device including FINFET structures with varied epitaxial regions, related method and design structure'2014 8,912,059'Middle of-line borderless contact structure and method of forming'2014 8,900,954'Blanket short channel roll-up implant with non-angled long channel compensating implant through patterned opening'2014 8,890,257'Damascene method of forming a semiconductor structure and a semiconductor structure with multiple fin-shaped channel regions having different widths'2014 8,878,260'Devices with gate-to-gate isolation structures and methods of manufacture'2014 8,835,261'Field effect transistor structure and method of forming same'2014 8,809,954'Partially depleted (PD) semiconductor-on-insulator (SOI) field effect transistor (FET) structure with a gate-to-body tunnel current region for threshold voltage (Vt) lowering and method of forming the structure'2014 8,791,721'Circuit with stacked structure and use thereof'2014 8,765,516'Low cost solar cell manufacture method employing a reusable substrate'2014 8,759,916'Field effect transistor and a method of forming the transistor'2014 8,753,929'Structure fabrication method'2014 8,735,972'SRAM cell having recessed storage node connections and method of fabricating same'2014 8,735,990'Radiation hardened FinFET'2014 8,698,245'Partially depleted (PD) semiconductor-on-insulator (SOI) field effect transistor (FET) structure with a gate-to-body tunnel current region for threshold voltage (VT) lowering and method of forming the structure'2014 8,679,918'Multiple-gate device with floating back gate'2014 8,647,935'Buried oxidation for enhanced mobility'2014 8,643,109'Isolation region fabrication for replacement gate processing'2014 8,637,871'Asymmetric hetero-structure FET and method of manufacture'2014 8,624,204'Serial irradiation of a substrate by multiple radiation sources'2014 8,623,719'Method for forming and structure of a recessed source/drain strap for a MUGFET'2014 8,617,412'Nano-filter and method of forming same, and method of filtration'2013 8,609,453'Low cost solar cell manufacture method employing a reusable substrate'2013 8,610,185'Non-uniform gate dielectric charge for pixel sensor cells and methods of manufacturing'2013 8,586,488'Configuring radiation sources to simultaneously irradiate a substrate'2013 8,580,601'Pixel sensor cell with a dual work function gate electrode'2013 8,569,131'Source/drain-to-source/drain recessed strap and methods of manufacture of same'2013 8,557,647'Method for fabricating field effect transistor devices with high-aspect ratio mask'2013 8,557,624'Pixel sensor cells with a split-dielectric transfer gate'2013 8,546,208'Isolation region fabrication for replacement gate processing'2013 8,546,252'Metal gate FET having reduced threshold voltage roll-off'2013 8,536,018'Maskless inter-well deep trench isolation structure and methods of manufacture'2013 8,524,546'Formation of multi-height MUGFET'2013 8,524,545'Simultaneous formation of FinFET and MUGFET'2013 8,518,757'Method of fabricating strained semiconductor structures from silicon-on-insulator (SOI)'2013 8,513,739'Metal-gate high-k reference structure'2013 8,513,743'Field effect transistor with channel region having portions with different band structures for suppressed corner leakage'2013 8,507,333'Integrated circuit device with series-connected field effect transistors and integrated voltage equalization and method of forming the device'2013 8,497,529'Trench generated device structures and design structures for radiofrequency and BiCMOS integrated circuits'2013 8,492,845'Gate-to-gate recessed strap and methods of manufacture of same'2013 8,492,819'FET eDRAM trench self-aligned to buried strap'2013 8,492,820'Integrated circuit and a method using integrated process steps to form deep trench isolation structures and deep trench capacitor structures for the integrated circuit'2013 8,492,841'Trench-generated transistor structures, device structures, and design structures'2013 8,492,214'Damascene metal gate and shield structure, methods of manufacture and design structures'2013 8,476,716'Band edge engineered Vt offset device'2013 8,470,674'Structure, method and system for complementary strain fill for integrated circuit chips'2013 8,471,344'Integrated circuit device with series-connected fin-type field effect transistors and integrated voltage equalization and method of forming the device'2013 8,466,503'Semiconductor transistors with expanded top portions of gates'2013 8,461,034'Localized implant into active region for enhanced stress'2013 8,455,330'Devices with gate-to-gate isolation structures and methods of manufacture'2013 8,445,965'Strained semiconductor devices and methods of fabricating strained semiconductor devices'2013 8,445,949'Field effect transistors (FETS) and methods of manufacture'2013 8,420,471'Dense pitch bulk FinFET process by selective EPI and etch'2013 8,420,460'Method, structure and design structure for customizing history effects of SOI circuits'2013 8,415,216'Multi-gate non-planar field effect transistor structure and method of forming the structure using a dopant implant process to tune device drive current'2013 8,410,554'Method, structure and design structure for customizing history effects of SOI circuits'2013 8,404,560'Devices with gate-to-gate isolation structures and methods of manufacture'2013 8,383,443'Non-uniform gate dielectric charge for pixel sensor cells and methods of manufacturing'2013 8,378,419'Isolation FET for integrated circuit'2013 8,378,394'Method for forming and structure of a recessed source/drain strap for a MUGFET'2013 8,377,780'Transistors having stressed channel regions and methods of forming transistors having stressed channel regions'2013 8,354,351'Serial irradiation of a substrate by multiple radiation sources'2013 8,354,319'Integrated planar and multiple gate FETs'2013 8,350,343'Field effect transistor with channel region edge and center portions having different band structures for suppressed corner leakage'2013 8,343,836'Recessed gate channel with low Vt corner'2013 8,299,505'Pixel sensor cell with a dual work function gate electode'2012 8,298,913'Devices with gate-to-gate isolation structures and methods of manufacture'2012 8,299,538'Differential nitride pullback to create differential NFET to PFET divots for improved performance versus leakage'2012 8,299,534'FET with replacement gate structure and method of fabricating the same'2012 8,294,222'Band edge engineered Vt offset device'2012 8,288,806'Asymmetric field effect transistor structure and method'2012 8,242,561'Semiconductor devices with improved self-aligned contact areas'2012 8,237,471'Circuit with stacked structure and use thereof'2012 8,237,233'Field effect transistor having a gate structure with a first section above a center portion of the channel region and having a first effective work function and second sections above edges of the channel region and having a second effective work function'2012 8,232,164'Damascene method of forming a semiconductor structure and a semiconductor structure with multiple fin-shaped channel regions having different widths'2012 8,234,594'Redundant micro-loop structure for use in an integrated circuit physical design process and method of forming the same'2012 8,232,627'Integrated circuit device with series-connected field effect transistors and integrated voltage equalization and method of forming the device'2012 8,227,867'Body contacted hybrid surface semiconductor-on-insulator devices'2012 8,227,301'Semiconductor device structures with floating body charge storage and methods for forming such semiconductor device structures'2012 8,217,456'Low capacitance hi-K dual work function metal gate body-contacted field effect transistor'2012 8,211,759'Semiconductor structure and methods of manufacture'2012 8,211,741'Carbon nanotube based integrated semiconductor circuit'2012 8,203,212'Air gaps in a multilayer integrated circuit and method of making same'2012 8,198,682'Semiconductor structure having a gate electrode at least partially disposed in a trench formed at a bend in a semiconductor material'2012 8,193,067'Integrated circuit and a method using integrated process steps to form deep trench isolation structures and deep trench capacitor structures for the integrated circuit'2012 8,188,546'Multi-gate non-planar field effect transistor structure and method of forming the structure using a dopant implant process to tune device drive current'2012 8,184,472'Split-gate DRAM with lateral control-gate MuGFET'2012 8,158,500'Field effect transistors (FETS) and methods of manufacture'2012 8,159,008'Method of fabricating a trench-generated transistor structure'2012 8,138,072'Semiconductor structures and methods of manufacture'2012 8,125,007'Integrated circuit including FinFET RF switch angled relative to planar MOSFET and related design structure'2012 8,125,037'Field effect transistor with channel region edge and center portions having different band structures for suppressed corner leakage'2012 8,119,474'High performance capacitors in planar back gates CMOS'2012 8,115,251'Recessed gate channel with low Vt corner'2012 8,106,457'Silicon-on-insulator based radiation detection device and method'2012 8,080,465'Semiconductor wafer structure with balanced reflectance and absorption characteristics for rapid thermal anneal uniformity'2011 8,080,485'Localized temperature control during rapid thermal anneal'2011 8,076,204'Graphene-based transistor'2011 8,053,318'FET with replacement gate structure and method of fabricating the same'2011 8,053,348'Method of forming a semiconductor device using a sacrificial uniform vertical thickness spacer structure'2011 8,053,314'Asymmetric field effect transistor structure and method'2011 8,039,376'Methods of changing threshold voltages of semiconductor transistors by ion implantation'2011 8,039,929'Asymmetrically stressed CMOS FinFET'2011 8,039,908'Damascene gate having protected shorting regions'2011 8,036,022'Structure and method of using asymmetric junction engineered SRAM pass gates, and design structure'2011 8,022,478'Method of forming a multi-fin multi-gate field effect transistor with tailored drive current'2011 8,017,934'Carbon nanotube based integrated semiconductor circuit'2011 8,003,516'BEOL interconnect structures and related fabrication methods'2011 8,003,463'Structure, design structure and method of manufacturing dual metal gate Vt roll-up structure'2011 7,994,612'FinFETs single-sided implant formation'2011 7,993,989'Vertical spacer forming and related transistor'2011 7,984,394'Design structure for a redundant micro-loop structure for use in an integrated circuit physical design process and method of forming the same'2011 7,981,772'Methods of fabricating nanostructures'2011 7,982,269'Transistors having asymmetric strained source/drain portions'2011 7,979,836'Split-gate DRAM with MuGFET, design structure, and method of manufacture'2011 7,971,158'Spacer fill structure, method and design structure for reducing device variation'2011 7,964,467'Method, structure and design structure for customizing history effects of soi circuits'2011 7,964,465'Transistors having asymmetric strained source/drain portions'2011 7,964,922'Structure, design structure and method of manufacturing dual metal gate VT roll-up structure'2011 7,960,791'Dense pitch bulk FinFET process by selective EPI and etch'2011 7,960,836'Redundant micro-loop structure for use in an integrated circuit physical design process and method of forming the same'2011 7,952,088'Semiconducting device having graphene channel'2011 7,951,678'Metal-gate high-k reference structure'2011 7,943,997'Fully-depleted low-body doping field effect transistor (FET) with reverse short channel effects (SCE) induced by self-aligned edge back-gate(s)'2011 7,939,417'Bipolar transistor and back-gated transistor structure and method'2011 7,937,675'Structure including transistor having gate and body in direct self-aligned contact'2011 7,935,560'Imagers having electrically active optical elements'2011 7,932,134'Method of forming a semiconductor structure'2011 7,915,670'Asymmetric field effect transistor structure and method'2011 7,910,418'Complementary metal gate dense interconnect and method of manufacturing'2011 7,902,000'MugFET with stub source and drain regions'2011 7,902,608'Integrated circuit device with deep trench isolation regions for all inter-well and intra-well isolation and with a shared contact to a junction between adjacent device diffusion regions and an underlying floating well section'2011 7,902,625'Metal-gate thermocouple'2011 7,898,065'Structure and method for device-specific fill for improved anneal uniformity'2011 7,891,865'Structure for bolometric on-chip temperature sensor'2011 7,888,736'MUGFET with optimized fill structures'2011 7,888,750'Multi-fin multi-gate field effect transistor with tailored drive current'2011 7,888,743'Substrate backgate for trigate FET'2011 7,888,780'Semiconductor structures incorporating multiple crystallographic planes and methods for fabrication thereof'2011 7,877,712'System for and method of verifying IC authenticity'2011 7,871,876'Method of forming a dual-plane complementary metal oxide semiconductor'2011 7,872,310'Semiconductor structure and system for fabricating an integrated circuit chip'2011 7,851,315'Method for fabricating a field effect transistor having a dual thickness gate electrode'2010 7,851,865'Fin-type field effect transistor structure with merged source/drain silicide and method of forming the structure'2010 7,851,283'Field effect transistor with raised source/drain fin straps'2010 7,847,320'Dense chevron non-planar field effect transistors and method'2010 7,843,016'Asymmetric field effect transistor structure and method'2010 7,838,353'Field effect transistor with suppressed corner leakage through channel material band-edge modulation, design structure and method'2010 7,838,355'Differential nitride pullback to create differential NFET to PFET divots for improved performance versus leakage'2010 7,829,407'Method of fabricating a stressed MOSFET by bending SOI region'2010 7,821,109'Stressed dielectric devices and methods of fabricating same'2010 7,816,738'Low-cost FEOL for ultra-low power, near sub-vth device structures'2010 7,811,875'Dual work-function single gate stack'2010 7,811,871'Low-capacitance contact for long gate-length devices with small contacted pitch'2010 7,795,098'Rotated field effect transistors and method of manufacture'2010 7,791,928'Design structure, structure and method of using asymmetric junction engineered SRAM pass gates'2010 7,790,636'Simultaneous irradiation of a substrate by multiple radiation sources'2010 7,791,166'Formation of dummy features and inductors in semiconductor fabrication'2010 7,790,611'Method for FEOL and BEOL wiring'2010 7,785,955'CMOS structure and method including multiple crystallographic planes'2010 7,786,466'Carbon nanotube based integrated semiconductor circuit'2010 7,781,283'Split-gate DRAM with MuGFET, design structure, and method of manufacture'2010 7,772,656'Combination planar FET and FinFET device'2010 7,772,647'Structure and design structure having isolated back gates for fully depleted SOI devices'2010 7,759,179'Multi-gated, high-mobility, density improved devices'2010 7,759,773'Semiconductor wafer structure with balanced reflectance and absorption characteristics for rapid thermal anneal uniformity'2010 7,745,909'Localized temperature control during rapid thermal anneal'2010 7,745,879'Method of fabricating high voltage fully depleted SOI transistor and structure thereof'2010 7,741,672'Bridged gate FinFet'2010 7,741,184'Fin device with capacitor integrated under gate electrode'2010 7,736,053'Bolometric on-chip temperature sensor'2010 7,732,859'Graphene-based transistor'2010 7,718,489'Double-gate FETs (field effect transistors)'2010 7,709,892'Semiconductor device having freestanding semiconductor layer'2010 7,709,313'High performance capacitors in planar back gates CMOS'2010 7,700,446'Virtual body-contacted trigate'2010

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1992–2021Patents assigned to IBM (459)· patent assignee history

1992–2021Based in Essex Junction, VT, US· patent location history

1996–2016Based in Essex, VT, US· patent location history

2011–2017Patents assigned to NOWAK EDWARD J (96)· patent assignee history

2011–2017Patents assigned to ANDERSON BRENT A (88)· patent assignee history

2012–2017Patents assigned to BRYANT ANDRES (31)· patent assignee history

2015–2021Patents assigned to GLOBALFOUNDRIES INC (50)· patent assignee history

2016Based in Shelbume, VT, US· patent location history

2017–2021Based in Shelburne, VT, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	459	1992–2021
NOWAK EDWARD Jself	96	2011–2017
ANDERSON BRENT A	88	2011–2017
GLOBALFOUNDRIES INC	50	2015–2021
BRYANT ANDRES	31	2012–2017

Locations

Location	Patents	Span
Essex Junction, VT, US	449	1992–2021
Shelburne, VT, US	33	2017–2021
Essex, VT, US	20	1996–2016
Shelbume, VT, US	1	2016